[−][src]Struct nrf52840_hal::target::twi0::RegisterBlock
Register block
Fields
tasks_startrx: Reg<u32, _TASKS_STARTRX>
0x00 - Start TWI receive sequence
tasks_starttx: Reg<u32, _TASKS_STARTTX>
0x08 - Start TWI transmit sequence
tasks_stop: Reg<u32, _TASKS_STOP>
0x14 - Stop TWI transaction
tasks_suspend: Reg<u32, _TASKS_SUSPEND>
0x1c - Suspend TWI transaction
tasks_resume: Reg<u32, _TASKS_RESUME>
0x20 - Resume TWI transaction
events_stopped: Reg<u32, _EVENTS_STOPPED>
0x104 - TWI stopped
events_rxdready: Reg<u32, _EVENTS_RXDREADY>
0x108 - TWI RXD byte received
events_txdsent: Reg<u32, _EVENTS_TXDSENT>
0x11c - TWI TXD byte sent
events_error: Reg<u32, _EVENTS_ERROR>
0x124 - TWI error
events_bb: Reg<u32, _EVENTS_BB>
0x138 - TWI byte boundary, generated before each byte that is sent or received
events_suspended: Reg<u32, _EVENTS_SUSPENDED>
0x148 - TWI entered the suspended state
shorts: Reg<u32, _SHORTS>
0x200 - Shortcut register
intenset: Reg<u32, _INTENSET>
0x304 - Enable interrupt
intenclr: Reg<u32, _INTENCLR>
0x308 - Disable interrupt
errorsrc: Reg<u32, _ERRORSRC>
0x4c4 - Error source
enable: Reg<u32, _ENABLE>
0x500 - Enable TWI
psel: PSEL
0x508 - Unspecified
rxd: Reg<u32, _RXD>
0x518 - RXD register
txd: Reg<u32, _TXD>
0x51c - TXD register
frequency: Reg<u32, _FREQUENCY>
0x524 - TWI frequency. Accuracy depends on the HFCLK source selected.
address: Reg<u32, _ADDRESS>
0x588 - Address used in the TWI transfer
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