Struct nrf52833_hal::pac::spim0::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 24 fields
pub tasks_start: Reg<TASKS_START_SPEC>,
pub tasks_stop: Reg<TASKS_STOP_SPEC>,
pub tasks_suspend: Reg<TASKS_SUSPEND_SPEC>,
pub tasks_resume: Reg<TASKS_RESUME_SPEC>,
pub events_stopped: Reg<EVENTS_STOPPED_SPEC>,
pub events_endrx: Reg<EVENTS_ENDRX_SPEC>,
pub events_end: Reg<EVENTS_END_SPEC>,
pub events_endtx: Reg<EVENTS_ENDTX_SPEC>,
pub events_started: Reg<EVENTS_STARTED_SPEC>,
pub shorts: Reg<SHORTS_SPEC>,
pub intenset: Reg<INTENSET_SPEC>,
pub intenclr: Reg<INTENCLR_SPEC>,
pub stallstat: Reg<STALLSTAT_SPEC>,
pub enable: Reg<ENABLE_SPEC>,
pub psel: PSEL,
pub frequency: Reg<FREQUENCY_SPEC>,
pub rxd: RXD,
pub txd: TXD,
pub config: Reg<CONFIG_SPEC>,
pub iftiming: IFTIMING,
pub csnpol: Reg<CSNPOL_SPEC>,
pub pseldcx: Reg<PSELDCX_SPEC>,
pub dcxcnt: Reg<DCXCNT_SPEC>,
pub orc: Reg<ORC_SPEC>,
// some fields omitted
}
Expand description
Register block
Fields
tasks_start: Reg<TASKS_START_SPEC>
0x10 - Start SPI transaction
tasks_stop: Reg<TASKS_STOP_SPEC>
0x14 - Stop SPI transaction
tasks_suspend: Reg<TASKS_SUSPEND_SPEC>
0x1c - Suspend SPI transaction
tasks_resume: Reg<TASKS_RESUME_SPEC>
0x20 - Resume SPI transaction
events_stopped: Reg<EVENTS_STOPPED_SPEC>
0x104 - SPI transaction has stopped
events_endrx: Reg<EVENTS_ENDRX_SPEC>
0x110 - End of RXD buffer reached
events_end: Reg<EVENTS_END_SPEC>
0x118 - End of RXD buffer and TXD buffer reached
events_endtx: Reg<EVENTS_ENDTX_SPEC>
0x120 - End of TXD buffer reached
events_started: Reg<EVENTS_STARTED_SPEC>
0x14c - Transaction started
shorts: Reg<SHORTS_SPEC>
0x200 - Shortcuts between local events and tasks
intenset: Reg<INTENSET_SPEC>
0x304 - Enable interrupt
intenclr: Reg<INTENCLR_SPEC>
0x308 - Disable interrupt
stallstat: Reg<STALLSTAT_SPEC>
0x400 - Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU.
enable: Reg<ENABLE_SPEC>
0x500 - Enable SPIM
psel: PSEL
0x508..0x518 - Unspecified
frequency: Reg<FREQUENCY_SPEC>
0x524 - SPI frequency. Accuracy depends on the HFCLK source selected.
rxd: RXD
0x534..0x544 - RXD EasyDMA channel
txd: TXD
0x544..0x554 - TXD EasyDMA channel
config: Reg<CONFIG_SPEC>
0x554 - Configuration register
iftiming: IFTIMING
0x560..0x568 - Unspecified
csnpol: Reg<CSNPOL_SPEC>
0x568 - Polarity of CSN output
pseldcx: Reg<PSELDCX_SPEC>
0x56c - Pin select for DCX signal
dcxcnt: Reg<DCXCNT_SPEC>
0x570 - DCX configuration
orc: Reg<ORC_SPEC>
0x5c0 - Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
Mutably borrows from an owned value. Read more
Casts the value.
Performs the conversion.
Performs the conversion.
Casts the value.
Casts the value.
Casts the value.
Casts the value.