Struct nrf52832_hal::pac::ppi::chenclr::W

pub struct W(/* private fields */);

Register CHENCLR writer

Implementations

impl W

pub fn ch0(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH0_AW, Bit1C, 0>

Bit 0 - Channel 0 enable clear register. Writing ‘0’ has no effect

pub fn ch1(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH1_AW, Bit1C, 1>

Bit 1 - Channel 1 enable clear register. Writing ‘0’ has no effect

pub fn ch2(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH2_AW, Bit1C, 2>

Bit 2 - Channel 2 enable clear register. Writing ‘0’ has no effect

pub fn ch3(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH3_AW, Bit1C, 3>

Bit 3 - Channel 3 enable clear register. Writing ‘0’ has no effect

pub fn ch4(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH4_AW, Bit1C, 4>

Bit 4 - Channel 4 enable clear register. Writing ‘0’ has no effect

pub fn ch5(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH5_AW, Bit1C, 5>

Bit 5 - Channel 5 enable clear register. Writing ‘0’ has no effect

pub fn ch6(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH6_AW, Bit1C, 6>

Bit 6 - Channel 6 enable clear register. Writing ‘0’ has no effect

pub fn ch7(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH7_AW, Bit1C, 7>

Bit 7 - Channel 7 enable clear register. Writing ‘0’ has no effect

pub fn ch8(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH8_AW, Bit1C, 8>

Bit 8 - Channel 8 enable clear register. Writing ‘0’ has no effect

pub fn ch9(&mut self) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH9_AW, Bit1C, 9>

Bit 9 - Channel 9 enable clear register. Writing ‘0’ has no effect

pub fn ch10( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH10_AW, Bit1C, 10>

Bit 10 - Channel 10 enable clear register. Writing ‘0’ has no effect

pub fn ch11( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH11_AW, Bit1C, 11>

Bit 11 - Channel 11 enable clear register. Writing ‘0’ has no effect

pub fn ch12( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH12_AW, Bit1C, 12>

Bit 12 - Channel 12 enable clear register. Writing ‘0’ has no effect

pub fn ch13( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH13_AW, Bit1C, 13>

Bit 13 - Channel 13 enable clear register. Writing ‘0’ has no effect

pub fn ch14( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH14_AW, Bit1C, 14>

Bit 14 - Channel 14 enable clear register. Writing ‘0’ has no effect

pub fn ch15( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH15_AW, Bit1C, 15>

Bit 15 - Channel 15 enable clear register. Writing ‘0’ has no effect

pub fn ch16( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH16_AW, Bit1C, 16>

Bit 16 - Channel 16 enable clear register. Writing ‘0’ has no effect

pub fn ch17( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH17_AW, Bit1C, 17>

Bit 17 - Channel 17 enable clear register. Writing ‘0’ has no effect

pub fn ch18( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH18_AW, Bit1C, 18>

Bit 18 - Channel 18 enable clear register. Writing ‘0’ has no effect

pub fn ch19( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH19_AW, Bit1C, 19>

Bit 19 - Channel 19 enable clear register. Writing ‘0’ has no effect

pub fn ch20( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH20_AW, Bit1C, 20>

Bit 20 - Channel 20 enable clear register. Writing ‘0’ has no effect

pub fn ch21( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH21_AW, Bit1C, 21>

Bit 21 - Channel 21 enable clear register. Writing ‘0’ has no effect

pub fn ch22( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH22_AW, Bit1C, 22>

Bit 22 - Channel 22 enable clear register. Writing ‘0’ has no effect

pub fn ch23( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH23_AW, Bit1C, 23>

Bit 23 - Channel 23 enable clear register. Writing ‘0’ has no effect

pub fn ch24( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH24_AW, Bit1C, 24>

Bit 24 - Channel 24 enable clear register. Writing ‘0’ has no effect

pub fn ch25( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH25_AW, Bit1C, 25>

Bit 25 - Channel 25 enable clear register. Writing ‘0’ has no effect

pub fn ch26( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH26_AW, Bit1C, 26>

Bit 26 - Channel 26 enable clear register. Writing ‘0’ has no effect

pub fn ch27( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH27_AW, Bit1C, 27>

Bit 27 - Channel 27 enable clear register. Writing ‘0’ has no effect

pub fn ch28( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH28_AW, Bit1C, 28>

Bit 28 - Channel 28 enable clear register. Writing ‘0’ has no effect

pub fn ch29( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH29_AW, Bit1C, 29>

Bit 29 - Channel 29 enable clear register. Writing ‘0’ has no effect

pub fn ch30( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH30_AW, Bit1C, 30>

Bit 30 - Channel 30 enable clear register. Writing ‘0’ has no effect

pub fn ch31( &mut self ) -> BitWriterRaw<'_, u32, CHENCLR_SPEC, CH31_AW, Bit1C, 31>

Bit 31 - Channel 31 enable clear register. Writing ‘0’ has no effect

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CHENCLR_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Trait Implementations

impl Deref for W

type Target = W<CHENCLR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CHENCLR_SPEC>> for W

fn from(writer: W<CHENCLR_SPEC>) -> W

Converts to this type from the input type.