Struct nrf52832_hal::pac::twis0::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {}Show 24 fields
pub tasks_stop: Reg<u32, _TASKS_STOP>, pub tasks_suspend: Reg<u32, _TASKS_SUSPEND>, pub tasks_resume: Reg<u32, _TASKS_RESUME>, pub tasks_preparerx: Reg<u32, _TASKS_PREPARERX>, pub tasks_preparetx: Reg<u32, _TASKS_PREPARETX>, pub events_stopped: Reg<u32, _EVENTS_STOPPED>, pub events_error: Reg<u32, _EVENTS_ERROR>, pub events_rxstarted: Reg<u32, _EVENTS_RXSTARTED>, pub events_txstarted: Reg<u32, _EVENTS_TXSTARTED>, pub events_write: Reg<u32, _EVENTS_WRITE>, pub events_read: Reg<u32, _EVENTS_READ>, pub shorts: Reg<u32, _SHORTS>, pub inten: Reg<u32, _INTEN>, pub intenset: Reg<u32, _INTENSET>, pub intenclr: Reg<u32, _INTENCLR>, pub errorsrc: Reg<u32, _ERRORSRC>, pub match_: Reg<u32, _MATCH>, pub enable: Reg<u32, _ENABLE>, pub psel: PSEL, pub rxd: RXD, pub txd: TXD, pub address: [Reg<u32, _ADDRESS>; 2], pub config: Reg<u32, _CONFIG>, pub orc: Reg<u32, _ORC>, // some fields omitted
Expand description
Register block
Fields
tasks_stop: Reg<u32, _TASKS_STOP>
0x14 - Stop TWI transaction
tasks_suspend: Reg<u32, _TASKS_SUSPEND>
0x1c - Suspend TWI transaction
tasks_resume: Reg<u32, _TASKS_RESUME>
0x20 - Resume TWI transaction
tasks_preparerx: Reg<u32, _TASKS_PREPARERX>
0x30 - Prepare the TWI slave to respond to a write command
tasks_preparetx: Reg<u32, _TASKS_PREPARETX>
0x34 - Prepare the TWI slave to respond to a read command
events_stopped: Reg<u32, _EVENTS_STOPPED>
0x104 - TWI stopped
events_error: Reg<u32, _EVENTS_ERROR>
0x124 - TWI error
events_rxstarted: Reg<u32, _EVENTS_RXSTARTED>
0x14c - Receive sequence started
events_txstarted: Reg<u32, _EVENTS_TXSTARTED>
0x150 - Transmit sequence started
events_write: Reg<u32, _EVENTS_WRITE>
0x164 - Write command received
events_read: Reg<u32, _EVENTS_READ>
0x168 - Read command received
shorts: Reg<u32, _SHORTS>
0x200 - Shortcut register
inten: Reg<u32, _INTEN>
0x300 - Enable or disable interrupt
intenset: Reg<u32, _INTENSET>
0x304 - Enable interrupt
intenclr: Reg<u32, _INTENCLR>
0x308 - Disable interrupt
errorsrc: Reg<u32, _ERRORSRC>
0x4d0 - Error source
match_: Reg<u32, _MATCH>
0x4d4 - Status register indicating which address had a match
enable: Reg<u32, _ENABLE>
0x500 - Enable TWIS
psel: PSEL
0x508 - Unspecified
rxd: RXD
0x534 - RXD EasyDMA channel
txd: TXD
0x544 - TXD EasyDMA channel
address: [Reg<u32, _ADDRESS>; 2]
0x588 - Description collection[0]: TWI slave address 0
config: Reg<u32, _CONFIG>
0x594 - Configuration register for the address match mechanism
orc: Reg<u32, _ORC>
0x5c0 - Over-read character. Character sent out in case of an over-read of the transmit buffer.