[−][src]Struct nrf52832_hal::pac::uarte0::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub tasks_startrx: Reg<u32, _TASKS_STARTRX>,
    pub tasks_stoprx: Reg<u32, _TASKS_STOPRX>,
    pub tasks_starttx: Reg<u32, _TASKS_STARTTX>,
    pub tasks_stoptx: Reg<u32, _TASKS_STOPTX>,
    pub tasks_flushrx: Reg<u32, _TASKS_FLUSHRX>,
    pub events_cts: Reg<u32, _EVENTS_CTS>,
    pub events_ncts: Reg<u32, _EVENTS_NCTS>,
    pub events_rxdrdy: Reg<u32, _EVENTS_RXDRDY>,
    pub events_endrx: Reg<u32, _EVENTS_ENDRX>,
    pub events_txdrdy: Reg<u32, _EVENTS_TXDRDY>,
    pub events_endtx: Reg<u32, _EVENTS_ENDTX>,
    pub events_error: Reg<u32, _EVENTS_ERROR>,
    pub events_rxto: Reg<u32, _EVENTS_RXTO>,
    pub events_rxstarted: Reg<u32, _EVENTS_RXSTARTED>,
    pub events_txstarted: Reg<u32, _EVENTS_TXSTARTED>,
    pub events_txstopped: Reg<u32, _EVENTS_TXSTOPPED>,
    pub shorts: Reg<u32, _SHORTS>,
    pub inten: Reg<u32, _INTEN>,
    pub intenset: Reg<u32, _INTENSET>,
    pub intenclr: Reg<u32, _INTENCLR>,
    pub errorsrc: Reg<u32, _ERRORSRC>,
    pub enable: Reg<u32, _ENABLE>,
    pub psel: PSEL,
    pub baudrate: Reg<u32, _BAUDRATE>,
    pub rxd: RXD,
    pub txd: TXD,
    pub config: Reg<u32, _CONFIG>,
    // some fields omitted
}

Register block

Fields

tasks_startrx: Reg<u32, _TASKS_STARTRX>

0x00 - Start UART receiver

tasks_stoprx: Reg<u32, _TASKS_STOPRX>

0x04 - Stop UART receiver

tasks_starttx: Reg<u32, _TASKS_STARTTX>

0x08 - Start UART transmitter

tasks_stoptx: Reg<u32, _TASKS_STOPTX>

0x0c - Stop UART transmitter

tasks_flushrx: Reg<u32, _TASKS_FLUSHRX>

0x2c - Flush RX FIFO into RX buffer

events_cts: Reg<u32, _EVENTS_CTS>

0x100 - CTS is activated (set low). Clear To Send.

events_ncts: Reg<u32, _EVENTS_NCTS>

0x104 - CTS is deactivated (set high). Not Clear To Send.

events_rxdrdy: Reg<u32, _EVENTS_RXDRDY>

0x108 - Data received in RXD (but potentially not yet transferred to Data RAM)

events_endrx: Reg<u32, _EVENTS_ENDRX>

0x110 - Receive buffer is filled up

events_txdrdy: Reg<u32, _EVENTS_TXDRDY>

0x11c - Data sent from TXD

events_endtx: Reg<u32, _EVENTS_ENDTX>

0x120 - Last TX byte transmitted

events_error: Reg<u32, _EVENTS_ERROR>

0x124 - Error detected

events_rxto: Reg<u32, _EVENTS_RXTO>

0x144 - Receiver timeout

events_rxstarted: Reg<u32, _EVENTS_RXSTARTED>

0x14c - UART receiver has started

events_txstarted: Reg<u32, _EVENTS_TXSTARTED>

0x150 - UART transmitter has started

events_txstopped: Reg<u32, _EVENTS_TXSTOPPED>

0x158 - Transmitter stopped

shorts: Reg<u32, _SHORTS>

0x200 - Shortcut register

inten: Reg<u32, _INTEN>

0x300 - Enable or disable interrupt

intenset: Reg<u32, _INTENSET>

0x304 - Enable interrupt

intenclr: Reg<u32, _INTENCLR>

0x308 - Disable interrupt

errorsrc: Reg<u32, _ERRORSRC>

0x480 - Error source

enable: Reg<u32, _ENABLE>

0x500 - Enable UART

psel: PSEL

0x508 - Unspecified

baudrate: Reg<u32, _BAUDRATE>

0x524 - Baud rate. Accuracy depends on the HFCLK source selected.

rxd: RXD

0x534 - RXD EasyDMA channel

txd: TXD

0x544 - TXD EasyDMA channel

config: Reg<u32, _CONFIG>

0x56c - Configuration of parity and hardware flow control

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