[−][src]Struct nrf52832_hal::pac::pwm0::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub tasks_stop: Reg<u32, _TASKS_STOP>,
    pub tasks_seqstart: [Reg<u32, _TASKS_SEQSTART>; 2],
    pub tasks_nextstep: Reg<u32, _TASKS_NEXTSTEP>,
    pub events_stopped: Reg<u32, _EVENTS_STOPPED>,
    pub events_seqstarted: [Reg<u32, _EVENTS_SEQSTARTED>; 2],
    pub events_seqend: [Reg<u32, _EVENTS_SEQEND>; 2],
    pub events_pwmperiodend: Reg<u32, _EVENTS_PWMPERIODEND>,
    pub events_loopsdone: Reg<u32, _EVENTS_LOOPSDONE>,
    pub shorts: Reg<u32, _SHORTS>,
    pub inten: Reg<u32, _INTEN>,
    pub intenset: Reg<u32, _INTENSET>,
    pub intenclr: Reg<u32, _INTENCLR>,
    pub enable: Reg<u32, _ENABLE>,
    pub mode: Reg<u32, _MODE>,
    pub countertop: Reg<u32, _COUNTERTOP>,
    pub prescaler: Reg<u32, _PRESCALER>,
    pub decoder: Reg<u32, _DECODER>,
    pub loop_: Reg<u32, _LOOP>,
    pub seq0: SEQ,
    pub seq1: SEQ,
    pub psel: PSEL,
    // some fields omitted
}

Register block

Fields

tasks_stop: Reg<u32, _TASKS_STOP>

0x04 - Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback

tasks_seqstart: [Reg<u32, _TASKS_SEQSTART>; 2]

0x08 - Description collection[0]: Loads the first PWM value on all enabled channels from sequence 0, and starts playing that sequence at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes PWM generation to start it was not running.

tasks_nextstep: Reg<u32, _TASKS_NEXTSTEP>

0x10 - Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start it was not running.

events_stopped: Reg<u32, _EVENTS_STOPPED>

0x104 - Response to STOP task, emitted when PWM pulses are no longer generated

events_seqstarted: [Reg<u32, _EVENTS_SEQSTARTED>; 2]

0x108 - Description collection[0]: First PWM period started on sequence 0

events_seqend: [Reg<u32, _EVENTS_SEQEND>; 2]

0x110 - Description collection[0]: Emitted at end of every sequence 0, when last value from RAM has been applied to wave counter

events_pwmperiodend: Reg<u32, _EVENTS_PWMPERIODEND>

0x118 - Emitted at the end of each PWM period

events_loopsdone: Reg<u32, _EVENTS_LOOPSDONE>

0x11c - Concatenated sequences have been played the amount of times defined in LOOP.CNT

shorts: Reg<u32, _SHORTS>

0x200 - Shortcut register

inten: Reg<u32, _INTEN>

0x300 - Enable or disable interrupt

intenset: Reg<u32, _INTENSET>

0x304 - Enable interrupt

intenclr: Reg<u32, _INTENCLR>

0x308 - Disable interrupt

enable: Reg<u32, _ENABLE>

0x500 - PWM module enable register

mode: Reg<u32, _MODE>

0x504 - Selects operating mode of the wave counter

countertop: Reg<u32, _COUNTERTOP>

0x508 - Value up to which the pulse generator counter counts

prescaler: Reg<u32, _PRESCALER>

0x50c - Configuration for PWM_CLK

decoder: Reg<u32, _DECODER>

0x510 - Configuration of the decoder

loop_: Reg<u32, _LOOP>

0x514 - Amount of playback of a loop

seq0: SEQ

0x520 - Unspecified

seq1: SEQ

0x540 - Unspecified

psel: PSEL

0x560 - Unspecified

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