[−][src]Struct nrf52832_hal::pac::twim0::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub tasks_startrx: Reg<u32, _TASKS_STARTRX>,
    pub tasks_starttx: Reg<u32, _TASKS_STARTTX>,
    pub tasks_stop: Reg<u32, _TASKS_STOP>,
    pub tasks_suspend: Reg<u32, _TASKS_SUSPEND>,
    pub tasks_resume: Reg<u32, _TASKS_RESUME>,
    pub events_stopped: Reg<u32, _EVENTS_STOPPED>,
    pub events_error: Reg<u32, _EVENTS_ERROR>,
    pub events_suspended: Reg<u32, _EVENTS_SUSPENDED>,
    pub events_rxstarted: Reg<u32, _EVENTS_RXSTARTED>,
    pub events_txstarted: Reg<u32, _EVENTS_TXSTARTED>,
    pub events_lastrx: Reg<u32, _EVENTS_LASTRX>,
    pub events_lasttx: Reg<u32, _EVENTS_LASTTX>,
    pub shorts: Reg<u32, _SHORTS>,
    pub inten: Reg<u32, _INTEN>,
    pub intenset: Reg<u32, _INTENSET>,
    pub intenclr: Reg<u32, _INTENCLR>,
    pub errorsrc: Reg<u32, _ERRORSRC>,
    pub enable: Reg<u32, _ENABLE>,
    pub psel: PSEL,
    pub frequency: Reg<u32, _FREQUENCY>,
    pub rxd: RXD,
    pub txd: TXD,
    pub address: Reg<u32, _ADDRESS>,
    // some fields omitted
}

Register block

Fields

tasks_startrx: Reg<u32, _TASKS_STARTRX>

0x00 - Start TWI receive sequence

tasks_starttx: Reg<u32, _TASKS_STARTTX>

0x08 - Start TWI transmit sequence

tasks_stop: Reg<u32, _TASKS_STOP>

0x14 - Stop TWI transaction. Must be issued while the TWI master is not suspended.

tasks_suspend: Reg<u32, _TASKS_SUSPEND>

0x1c - Suspend TWI transaction

tasks_resume: Reg<u32, _TASKS_RESUME>

0x20 - Resume TWI transaction

events_stopped: Reg<u32, _EVENTS_STOPPED>

0x104 - TWI stopped

events_error: Reg<u32, _EVENTS_ERROR>

0x124 - TWI error

events_suspended: Reg<u32, _EVENTS_SUSPENDED>

0x148 - Last byte has been sent out after the SUSPEND task has been issued, TWI traffic is now suspended.

events_rxstarted: Reg<u32, _EVENTS_RXSTARTED>

0x14c - Receive sequence started

events_txstarted: Reg<u32, _EVENTS_TXSTARTED>

0x150 - Transmit sequence started

events_lastrx: Reg<u32, _EVENTS_LASTRX>

0x15c - Byte boundary, starting to receive the last byte

events_lasttx: Reg<u32, _EVENTS_LASTTX>

0x160 - Byte boundary, starting to transmit the last byte

shorts: Reg<u32, _SHORTS>

0x200 - Shortcut register

inten: Reg<u32, _INTEN>

0x300 - Enable or disable interrupt

intenset: Reg<u32, _INTENSET>

0x304 - Enable interrupt

intenclr: Reg<u32, _INTENCLR>

0x308 - Disable interrupt

errorsrc: Reg<u32, _ERRORSRC>

0x4c4 - Error source

enable: Reg<u32, _ENABLE>

0x500 - Enable TWIM

psel: PSEL

0x508 - Unspecified

frequency: Reg<u32, _FREQUENCY>

0x524 - TWI frequency

rxd: RXD

0x534 - RXD EasyDMA channel

txd: TXD

0x544 - TXD EasyDMA channel

address: Reg<u32, _ADDRESS>

0x588 - Address used in the TWI transfer

Auto Trait Implementations

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.