Struct nrf52811_pac::ppi::chenclr::R [−][src]
pub struct R(_);
Expand description
Register CHENCLR
reader
Implementations
Bit 10 - Channel 10 enable clear register. Writing ‘0’ has no effect
Bit 11 - Channel 11 enable clear register. Writing ‘0’ has no effect
Bit 12 - Channel 12 enable clear register. Writing ‘0’ has no effect
Bit 13 - Channel 13 enable clear register. Writing ‘0’ has no effect
Bit 14 - Channel 14 enable clear register. Writing ‘0’ has no effect
Bit 15 - Channel 15 enable clear register. Writing ‘0’ has no effect
Bit 16 - Channel 16 enable clear register. Writing ‘0’ has no effect
Bit 17 - Channel 17 enable clear register. Writing ‘0’ has no effect
Bit 18 - Channel 18 enable clear register. Writing ‘0’ has no effect
Bit 19 - Channel 19 enable clear register. Writing ‘0’ has no effect
Bit 20 - Channel 20 enable clear register. Writing ‘0’ has no effect
Bit 21 - Channel 21 enable clear register. Writing ‘0’ has no effect
Bit 22 - Channel 22 enable clear register. Writing ‘0’ has no effect
Bit 23 - Channel 23 enable clear register. Writing ‘0’ has no effect
Bit 24 - Channel 24 enable clear register. Writing ‘0’ has no effect
Bit 25 - Channel 25 enable clear register. Writing ‘0’ has no effect
Bit 26 - Channel 26 enable clear register. Writing ‘0’ has no effect
Bit 27 - Channel 27 enable clear register. Writing ‘0’ has no effect
Bit 28 - Channel 28 enable clear register. Writing ‘0’ has no effect
Bit 29 - Channel 29 enable clear register. Writing ‘0’ has no effect
Bit 30 - Channel 30 enable clear register. Writing ‘0’ has no effect
Methods from Deref<Target = R<CHENCLR_SPEC>>
Trait Implementations
Performs the conversion.