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#[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { _reserved0: [u8; 264usize], #[doc = "0x108 - TXD byte sent and RXD byte received"] pub events_ready: EVENTS_READY, _reserved1: [u8; 504usize], #[doc = "0x304 - Enable interrupt"] pub intenset: INTENSET, #[doc = "0x308 - Disable interrupt"] pub intenclr: INTENCLR, _reserved3: [u8; 500usize], #[doc = "0x500 - Enable SPI"] pub enable: ENABLE, _reserved4: [u8; 4usize], #[doc = "0x508 - Unspecified"] pub psel: PSEL, _reserved5: [u8; 4usize], #[doc = "0x518 - RXD register"] pub rxd: RXD, #[doc = "0x51c - TXD register"] pub txd: TXD, _reserved7: [u8; 4usize], #[doc = "0x524 - SPI frequency. Accuracy depends on the HFCLK source selected."] pub frequency: FREQUENCY, _reserved8: [u8; 44usize], #[doc = "0x554 - Configuration register"] pub config: CONFIG, } #[doc = r"Register block"] #[repr(C)] pub struct PSEL { #[doc = "0x00 - Pin select for SCK"] pub sck: self::psel::SCK, #[doc = "0x04 - Pin select for MOSI signal"] pub mosi: self::psel::MOSI, #[doc = "0x08 - Pin select for MISO signal"] pub miso: self::psel::MISO, } #[doc = r"Register block"] #[doc = "Unspecified"] pub mod psel; #[doc = "TXD byte sent and RXD byte received\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [events_ready](events_ready) module"] pub type EVENTS_READY = crate::Reg<u32, _EVENTS_READY>; #[allow(missing_docs)] #[doc(hidden)] pub struct _EVENTS_READY; #[doc = "`read()` method returns [events_ready::R](events_ready::R) reader structure"] impl crate::Readable for EVENTS_READY {} #[doc = "`write(|w| ..)` method takes [events_ready::W](events_ready::W) writer structure"] impl crate::Writable for EVENTS_READY {} #[doc = "TXD byte sent and RXD byte received"] pub mod events_ready; #[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intenset](intenset) module"] pub type INTENSET = crate::Reg<u32, _INTENSET>; #[allow(missing_docs)] #[doc(hidden)] pub struct _INTENSET; #[doc = "`read()` method returns [intenset::R](intenset::R) reader structure"] impl crate::Readable for INTENSET {} #[doc = "`write(|w| ..)` method takes [intenset::W](intenset::W) writer structure"] impl crate::Writable for INTENSET {} #[doc = "Enable interrupt"] pub mod intenset; #[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intenclr](intenclr) module"] pub type INTENCLR = crate::Reg<u32, _INTENCLR>; #[allow(missing_docs)] #[doc(hidden)] pub struct _INTENCLR; #[doc = "`read()` method returns [intenclr::R](intenclr::R) reader structure"] impl crate::Readable for INTENCLR {} #[doc = "`write(|w| ..)` method takes [intenclr::W](intenclr::W) writer structure"] impl crate::Writable for INTENCLR {} #[doc = "Disable interrupt"] pub mod intenclr; #[doc = "Enable SPI\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [enable](enable) module"] pub type ENABLE = crate::Reg<u32, _ENABLE>; #[allow(missing_docs)] #[doc(hidden)] pub struct _ENABLE; #[doc = "`read()` method returns [enable::R](enable::R) reader structure"] impl crate::Readable for ENABLE {} #[doc = "`write(|w| ..)` method takes [enable::W](enable::W) writer structure"] impl crate::Writable for ENABLE {} #[doc = "Enable SPI"] pub mod enable; #[doc = "RXD register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxd](rxd) module"] pub type RXD = crate::Reg<u32, _RXD>; #[allow(missing_docs)] #[doc(hidden)] pub struct _RXD; #[doc = "`read()` method returns [rxd::R](rxd::R) reader structure"] impl crate::Readable for RXD {} #[doc = "RXD register"] pub mod rxd; #[doc = "TXD register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txd](txd) module"] pub type TXD = crate::Reg<u32, _TXD>; #[allow(missing_docs)] #[doc(hidden)] pub struct _TXD; #[doc = "`read()` method returns [txd::R](txd::R) reader structure"] impl crate::Readable for TXD {} #[doc = "`write(|w| ..)` method takes [txd::W](txd::W) writer structure"] impl crate::Writable for TXD {} #[doc = "TXD register"] pub mod txd; #[doc = "SPI frequency. Accuracy depends on the HFCLK source selected.\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [frequency](frequency) module"] pub type FREQUENCY = crate::Reg<u32, _FREQUENCY>; #[allow(missing_docs)] #[doc(hidden)] pub struct _FREQUENCY; #[doc = "`read()` method returns [frequency::R](frequency::R) reader structure"] impl crate::Readable for FREQUENCY {} #[doc = "`write(|w| ..)` method takes [frequency::W](frequency::W) writer structure"] impl crate::Writable for FREQUENCY {} #[doc = "SPI frequency. Accuracy depends on the HFCLK source selected."] pub mod frequency; #[doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [config](config) module"] pub type CONFIG = crate::Reg<u32, _CONFIG>; #[allow(missing_docs)] #[doc(hidden)] pub struct _CONFIG; #[doc = "`read()` method returns [config::R](config::R) reader structure"] impl crate::Readable for CONFIG {} #[doc = "`write(|w| ..)` method takes [config::W](config::W) writer structure"] impl crate::Writable for CONFIG {} #[doc = "Configuration register"] pub mod config;