nrf52/pdm/pdmclkctrl/
mod.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::PDMCLKCTRL {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = "Possible values of the field `FREQ`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum FREQR {
48    #[doc = "PDM_CLK = 32 MHz / 32 = 1.000 MHz"]
49    _1000K,
50    #[doc = "PDM_CLK = 32 MHz / 31 = 1.032 MHz"]
51    DEFAULT,
52    #[doc = "PDM_CLK = 32 MHz / 30 = 1.067 MHz"]
53    _1067K,
54    #[doc = r" Reserved"]
55    _Reserved(u32),
56}
57impl FREQR {
58    #[doc = r" Value of the field as raw bits"]
59    #[inline]
60    pub fn bits(&self) -> u32 {
61        match *self {
62            FREQR::_1000K => 134217728,
63            FREQR::DEFAULT => 138412032,
64            FREQR::_1067K => 142606336,
65            FREQR::_Reserved(bits) => bits,
66        }
67    }
68    #[allow(missing_docs)]
69    #[doc(hidden)]
70    #[inline]
71    pub fn _from(value: u32) -> FREQR {
72        match value {
73            134217728 => FREQR::_1000K,
74            138412032 => FREQR::DEFAULT,
75            142606336 => FREQR::_1067K,
76            i => FREQR::_Reserved(i),
77        }
78    }
79    #[doc = "Checks if the value of the field is `_1000K`"]
80    #[inline]
81    pub fn is_1000k(&self) -> bool {
82        *self == FREQR::_1000K
83    }
84    #[doc = "Checks if the value of the field is `DEFAULT`"]
85    #[inline]
86    pub fn is_default(&self) -> bool {
87        *self == FREQR::DEFAULT
88    }
89    #[doc = "Checks if the value of the field is `_1067K`"]
90    #[inline]
91    pub fn is_1067k(&self) -> bool {
92        *self == FREQR::_1067K
93    }
94}
95#[doc = "Values that can be written to the field `FREQ`"]
96pub enum FREQW {
97    #[doc = "PDM_CLK = 32 MHz / 32 = 1.000 MHz"]
98    _1000K,
99    #[doc = "PDM_CLK = 32 MHz / 31 = 1.032 MHz"]
100    DEFAULT,
101    #[doc = "PDM_CLK = 32 MHz / 30 = 1.067 MHz"]
102    _1067K,
103}
104impl FREQW {
105    #[allow(missing_docs)]
106    #[doc(hidden)]
107    #[inline]
108    pub fn _bits(&self) -> u32 {
109        match *self {
110            FREQW::_1000K => 134217728,
111            FREQW::DEFAULT => 138412032,
112            FREQW::_1067K => 142606336,
113        }
114    }
115}
116#[doc = r" Proxy"]
117pub struct _FREQW<'a> {
118    w: &'a mut W,
119}
120impl<'a> _FREQW<'a> {
121    #[doc = r" Writes `variant` to the field"]
122    #[inline]
123    pub fn variant(self, variant: FREQW) -> &'a mut W {
124        unsafe { self.bits(variant._bits()) }
125    }
126    #[doc = "PDM_CLK = 32 MHz / 32 = 1.000 MHz"]
127    #[inline]
128    pub fn _1000k(self) -> &'a mut W {
129        self.variant(FREQW::_1000K)
130    }
131    #[doc = "PDM_CLK = 32 MHz / 31 = 1.032 MHz"]
132    #[inline]
133    pub fn default(self) -> &'a mut W {
134        self.variant(FREQW::DEFAULT)
135    }
136    #[doc = "PDM_CLK = 32 MHz / 30 = 1.067 MHz"]
137    #[inline]
138    pub fn _1067k(self) -> &'a mut W {
139        self.variant(FREQW::_1067K)
140    }
141    #[doc = r" Writes raw bits to the field"]
142    #[inline]
143    pub unsafe fn bits(self, value: u32) -> &'a mut W {
144        const MASK: u32 = 4294967295;
145        const OFFSET: u8 = 0;
146        self.w.bits &= !((MASK as u32) << OFFSET);
147        self.w.bits |= ((value & MASK) as u32) << OFFSET;
148        self.w
149    }
150}
151impl R {
152    #[doc = r" Value of the register as raw bits"]
153    #[inline]
154    pub fn bits(&self) -> u32 {
155        self.bits
156    }
157    #[doc = "Bits 0:31 - PDM_CLK frequency"]
158    #[inline]
159    pub fn freq(&self) -> FREQR {
160        FREQR::_from({
161            const MASK: u32 = 4294967295;
162            const OFFSET: u8 = 0;
163            ((self.bits >> OFFSET) & MASK as u32) as u32
164        })
165    }
166}
167impl W {
168    #[doc = r" Reset value of the register"]
169    #[inline]
170    pub fn reset_value() -> W {
171        W { bits: 138412032 }
172    }
173    #[doc = r" Writes raw bits to the register"]
174    #[inline]
175    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
176        self.bits = bits;
177        self
178    }
179    #[doc = "Bits 0:31 - PDM_CLK frequency"]
180    #[inline]
181    pub fn freq(&mut self) -> _FREQW {
182        _FREQW { w: self }
183    }
184}
nrf52/pdm/pdmclkctrl/mod.rs

nrf52/pdm/pdmclkctrl/
mod.rs
