nrf51_pac/uicr/
xtalfreq.rs1#[doc = "Register `XTALFREQ` reader"]
2pub struct R(crate::R<XTALFREQ_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<XTALFREQ_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<XTALFREQ_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<XTALFREQ_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `XTALFREQ` writer"]
17pub struct W(crate::W<XTALFREQ_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<XTALFREQ_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<XTALFREQ_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<XTALFREQ_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `XTALFREQ` reader - Reset value for CLOCK XTALFREQ register."]
38pub type XTALFREQ_R = crate::FieldReader<u8, XTALFREQ_A>;
39#[doc = "Reset value for CLOCK XTALFREQ register.\n\nValue on reset: 255"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u8)]
42pub enum XTALFREQ_A {
43 #[doc = "255: 16MHz Xtal is used."]
44 _16MHZ = 255,
45 #[doc = "0: 32MHz Xtal is used."]
46 _32MHZ = 0,
47}
48impl From<XTALFREQ_A> for u8 {
49 #[inline(always)]
50 fn from(variant: XTALFREQ_A) -> Self {
51 variant as _
52 }
53}
54impl XTALFREQ_R {
55 #[doc = "Get enumerated values variant"]
56 #[inline(always)]
57 pub fn variant(&self) -> Option<XTALFREQ_A> {
58 match self.bits {
59 255 => Some(XTALFREQ_A::_16MHZ),
60 0 => Some(XTALFREQ_A::_32MHZ),
61 _ => None,
62 }
63 }
64 #[doc = "Checks if the value of the field is `_16MHZ`"]
65 #[inline(always)]
66 pub fn is_16mhz(&self) -> bool {
67 *self == XTALFREQ_A::_16MHZ
68 }
69 #[doc = "Checks if the value of the field is `_32MHZ`"]
70 #[inline(always)]
71 pub fn is_32mhz(&self) -> bool {
72 *self == XTALFREQ_A::_32MHZ
73 }
74}
75#[doc = "Field `XTALFREQ` writer - Reset value for CLOCK XTALFREQ register."]
76pub type XTALFREQ_W<'a, const O: u8> =
77 crate::FieldWriter<'a, u32, XTALFREQ_SPEC, u8, XTALFREQ_A, 8, O>;
78impl<'a, const O: u8> XTALFREQ_W<'a, O> {
79 #[doc = "16MHz Xtal is used."]
80 #[inline(always)]
81 pub fn _16mhz(self) -> &'a mut W {
82 self.variant(XTALFREQ_A::_16MHZ)
83 }
84 #[doc = "32MHz Xtal is used."]
85 #[inline(always)]
86 pub fn _32mhz(self) -> &'a mut W {
87 self.variant(XTALFREQ_A::_32MHZ)
88 }
89}
90impl R {
91 #[doc = "Bits 0:7 - Reset value for CLOCK XTALFREQ register."]
92 #[inline(always)]
93 pub fn xtalfreq(&self) -> XTALFREQ_R {
94 XTALFREQ_R::new((self.bits & 0xff) as u8)
95 }
96}
97impl W {
98 #[doc = "Bits 0:7 - Reset value for CLOCK XTALFREQ register."]
99 #[inline(always)]
100 pub fn xtalfreq(&mut self) -> XTALFREQ_W<0> {
101 XTALFREQ_W::new(self)
102 }
103 #[doc = "Writes raw bits to the register."]
104 #[inline(always)]
105 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
106 self.0.bits(bits);
107 self
108 }
109}
110#[doc = "Reset value for CLOCK XTALFREQ register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalfreq](index.html) module"]
111pub struct XTALFREQ_SPEC;
112impl crate::RegisterSpec for XTALFREQ_SPEC {
113 type Ux = u32;
114}
115#[doc = "`read()` method returns [xtalfreq::R](R) reader structure"]
116impl crate::Readable for XTALFREQ_SPEC {
117 type Reader = R;
118}
119#[doc = "`write(|w| ..)` method takes [xtalfreq::W](W) writer structure"]
120impl crate::Writable for XTALFREQ_SPEC {
121 type Writer = W;
122}
123#[doc = "`reset()` method sets XTALFREQ to value 0xffff_ffff"]
124impl crate::Resettable for XTALFREQ_SPEC {
125 #[inline(always)]
126 fn reset_value() -> Self::Ux {
127 0xffff_ffff
128 }
129}