n32g4/n32g455/tim1/
ctrl1.rs

1///Register `CTRL1` reader
2pub type R = crate::R<Ctrl1Spec>;
3///Register `CTRL1` writer
4pub type W = crate::W<Ctrl1Spec>;
5///Field `CNTEN` reader - CNTEN
6pub type CntenR = crate::BitReader;
7///Field `CNTEN` writer - CNTEN
8pub type CntenW<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `UPDIS` reader - UPDIS
10pub type UpdisR = crate::BitReader;
11///Field `UPDIS` writer - UPDIS
12pub type UpdisW<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `UPRS` reader - UPRS
14pub type UprsR = crate::BitReader;
15///Field `UPRS` writer - UPRS
16pub type UprsW<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `ONEPM` reader - ONEPM
18pub type OnepmR = crate::BitReader;
19///Field `ONEPM` writer - ONEPM
20pub type OnepmW<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `DIR` reader - DIR
22pub type DirR = crate::BitReader;
23///Field `DIR` writer - DIR
24pub type DirW<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `CAMSEL` reader - CAMSEL
26pub type CamselR = crate::FieldReader;
27///Field `CAMSEL` writer - CAMSEL
28pub type CamselW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29///Field `ARPEN` reader - ARPEN
30pub type ArpenR = crate::BitReader;
31///Field `ARPEN` writer - ARPEN
32pub type ArpenW<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `CLKD` reader - CLKD
34pub type ClkdR = crate::FieldReader;
35///Field `CLKD` writer - CLKD
36pub type ClkdW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
37///Field `IOMBKPEN` reader - IOMBKPEN
38pub type IombkpenR = crate::BitReader;
39///Field `IOMBKPEN` writer - IOMBKPEN
40pub type IombkpenW<'a, REG> = crate::BitWriter<'a, REG>;
41///Field `C1SEL` reader - C1SEL
42pub type C1selR = crate::BitReader;
43///Field `C1SEL` writer - C1SEL
44pub type C1selW<'a, REG> = crate::BitWriter<'a, REG>;
45///Field `C2SEL` reader - C2SEL
46pub type C2selR = crate::BitReader;
47///Field `C2SEL` writer - C2SEL
48pub type C2selW<'a, REG> = crate::BitWriter<'a, REG>;
49///Field `C3SEL` reader - C3SEL
50pub type C3selR = crate::BitReader;
51///Field `C3SEL` writer - C3SEL
52pub type C3selW<'a, REG> = crate::BitWriter<'a, REG>;
53///Field `C4SEL` reader - C4SEL
54pub type C4selR = crate::BitReader;
55///Field `C4SEL` writer - C4SEL
56pub type C4selW<'a, REG> = crate::BitWriter<'a, REG>;
57///Field `CLRSEL` reader - CLRSEL
58pub type ClrselR = crate::BitReader;
59///Field `CLRSEL` writer - CLRSEL
60pub type ClrselW<'a, REG> = crate::BitWriter<'a, REG>;
61///Field `LOCKUPEN` reader - LOCKUPEN
62pub type LockupenR = crate::BitReader;
63///Field `LOCKUPEN` writer - LOCKUPEN
64pub type LockupenW<'a, REG> = crate::BitWriter<'a, REG>;
65///Field `PBKPEN` reader - PBKPEN
66pub type PbkpenR = crate::BitReader;
67///Field `PBKPEN` writer - PBKPEN
68pub type PbkpenW<'a, REG> = crate::BitWriter<'a, REG>;
69impl R {
70    ///Bit 0 - CNTEN
71    #[inline(always)]
72    pub fn cnten(&self) -> CntenR {
73        CntenR::new((self.bits & 1) != 0)
74    }
75    ///Bit 1 - UPDIS
76    #[inline(always)]
77    pub fn updis(&self) -> UpdisR {
78        UpdisR::new(((self.bits >> 1) & 1) != 0)
79    }
80    ///Bit 2 - UPRS
81    #[inline(always)]
82    pub fn uprs(&self) -> UprsR {
83        UprsR::new(((self.bits >> 2) & 1) != 0)
84    }
85    ///Bit 3 - ONEPM
86    #[inline(always)]
87    pub fn onepm(&self) -> OnepmR {
88        OnepmR::new(((self.bits >> 3) & 1) != 0)
89    }
90    ///Bit 4 - DIR
91    #[inline(always)]
92    pub fn dir(&self) -> DirR {
93        DirR::new(((self.bits >> 4) & 1) != 0)
94    }
95    ///Bits 5:6 - CAMSEL
96    #[inline(always)]
97    pub fn camsel(&self) -> CamselR {
98        CamselR::new(((self.bits >> 5) & 3) as u8)
99    }
100    ///Bit 7 - ARPEN
101    #[inline(always)]
102    pub fn arpen(&self) -> ArpenR {
103        ArpenR::new(((self.bits >> 7) & 1) != 0)
104    }
105    ///Bits 8:9 - CLKD
106    #[inline(always)]
107    pub fn clkd(&self) -> ClkdR {
108        ClkdR::new(((self.bits >> 8) & 3) as u8)
109    }
110    ///Bit 10 - IOMBKPEN
111    #[inline(always)]
112    pub fn iombkpen(&self) -> IombkpenR {
113        IombkpenR::new(((self.bits >> 10) & 1) != 0)
114    }
115    ///Bit 11 - C1SEL
116    #[inline(always)]
117    pub fn c1sel(&self) -> C1selR {
118        C1selR::new(((self.bits >> 11) & 1) != 0)
119    }
120    ///Bit 12 - C2SEL
121    #[inline(always)]
122    pub fn c2sel(&self) -> C2selR {
123        C2selR::new(((self.bits >> 12) & 1) != 0)
124    }
125    ///Bit 13 - C3SEL
126    #[inline(always)]
127    pub fn c3sel(&self) -> C3selR {
128        C3selR::new(((self.bits >> 13) & 1) != 0)
129    }
130    ///Bit 14 - C4SEL
131    #[inline(always)]
132    pub fn c4sel(&self) -> C4selR {
133        C4selR::new(((self.bits >> 14) & 1) != 0)
134    }
135    ///Bit 15 - CLRSEL
136    #[inline(always)]
137    pub fn clrsel(&self) -> ClrselR {
138        ClrselR::new(((self.bits >> 15) & 1) != 0)
139    }
140    ///Bit 16 - LOCKUPEN
141    #[inline(always)]
142    pub fn lockupen(&self) -> LockupenR {
143        LockupenR::new(((self.bits >> 16) & 1) != 0)
144    }
145    ///Bit 17 - PBKPEN
146    #[inline(always)]
147    pub fn pbkpen(&self) -> PbkpenR {
148        PbkpenR::new(((self.bits >> 17) & 1) != 0)
149    }
150}
151impl W {
152    ///Bit 0 - CNTEN
153    #[inline(always)]
154    #[must_use]
155    pub fn cnten(&mut self) -> CntenW<Ctrl1Spec> {
156        CntenW::new(self, 0)
157    }
158    ///Bit 1 - UPDIS
159    #[inline(always)]
160    #[must_use]
161    pub fn updis(&mut self) -> UpdisW<Ctrl1Spec> {
162        UpdisW::new(self, 1)
163    }
164    ///Bit 2 - UPRS
165    #[inline(always)]
166    #[must_use]
167    pub fn uprs(&mut self) -> UprsW<Ctrl1Spec> {
168        UprsW::new(self, 2)
169    }
170    ///Bit 3 - ONEPM
171    #[inline(always)]
172    #[must_use]
173    pub fn onepm(&mut self) -> OnepmW<Ctrl1Spec> {
174        OnepmW::new(self, 3)
175    }
176    ///Bit 4 - DIR
177    #[inline(always)]
178    #[must_use]
179    pub fn dir(&mut self) -> DirW<Ctrl1Spec> {
180        DirW::new(self, 4)
181    }
182    ///Bits 5:6 - CAMSEL
183    #[inline(always)]
184    #[must_use]
185    pub fn camsel(&mut self) -> CamselW<Ctrl1Spec> {
186        CamselW::new(self, 5)
187    }
188    ///Bit 7 - ARPEN
189    #[inline(always)]
190    #[must_use]
191    pub fn arpen(&mut self) -> ArpenW<Ctrl1Spec> {
192        ArpenW::new(self, 7)
193    }
194    ///Bits 8:9 - CLKD
195    #[inline(always)]
196    #[must_use]
197    pub fn clkd(&mut self) -> ClkdW<Ctrl1Spec> {
198        ClkdW::new(self, 8)
199    }
200    ///Bit 10 - IOMBKPEN
201    #[inline(always)]
202    #[must_use]
203    pub fn iombkpen(&mut self) -> IombkpenW<Ctrl1Spec> {
204        IombkpenW::new(self, 10)
205    }
206    ///Bit 11 - C1SEL
207    #[inline(always)]
208    #[must_use]
209    pub fn c1sel(&mut self) -> C1selW<Ctrl1Spec> {
210        C1selW::new(self, 11)
211    }
212    ///Bit 12 - C2SEL
213    #[inline(always)]
214    #[must_use]
215    pub fn c2sel(&mut self) -> C2selW<Ctrl1Spec> {
216        C2selW::new(self, 12)
217    }
218    ///Bit 13 - C3SEL
219    #[inline(always)]
220    #[must_use]
221    pub fn c3sel(&mut self) -> C3selW<Ctrl1Spec> {
222        C3selW::new(self, 13)
223    }
224    ///Bit 14 - C4SEL
225    #[inline(always)]
226    #[must_use]
227    pub fn c4sel(&mut self) -> C4selW<Ctrl1Spec> {
228        C4selW::new(self, 14)
229    }
230    ///Bit 15 - CLRSEL
231    #[inline(always)]
232    #[must_use]
233    pub fn clrsel(&mut self) -> ClrselW<Ctrl1Spec> {
234        ClrselW::new(self, 15)
235    }
236    ///Bit 16 - LOCKUPEN
237    #[inline(always)]
238    #[must_use]
239    pub fn lockupen(&mut self) -> LockupenW<Ctrl1Spec> {
240        LockupenW::new(self, 16)
241    }
242    ///Bit 17 - PBKPEN
243    #[inline(always)]
244    #[must_use]
245    pub fn pbkpen(&mut self) -> PbkpenW<Ctrl1Spec> {
246        PbkpenW::new(self, 17)
247    }
248}
249///TIMx_CTRL1
250///
251///You can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
252pub struct Ctrl1Spec;
253impl crate::RegisterSpec for Ctrl1Spec {
254    type Ux = u32;
255}
256///`read()` method returns [`ctrl1::R`](R) reader structure
257impl crate::Readable for Ctrl1Spec {}
258///`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure
259impl crate::Writable for Ctrl1Spec {
260    type Safety = crate::Unsafe;
261    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
262    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
263}
264///`reset()` method sets CTRL1 to value 0
265impl crate::Resettable for Ctrl1Spec {
266    const RESET_VALUE: u32 = 0;
267}
n32g4/n32g455/tim1/ctrl1.rs

n32g4/n32g455/tim1/
ctrl1.rs
