[−][src]Struct muscab1_pac::sram0mpc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ctrl: CTRL,
    pub blk_max: BLK_MAX,
    pub blk_cfg: BLK_CFG,
    pub blk_idx: BLK_IDX,
    pub blk_lut: BLK_LUT,
    pub int_stat: INT_STAT,
    pub int_clear: INT_CLEAR,
    pub int_en: INT_EN,
    pub int_info1: INT_INFO1,
    pub int_info2: INT_INFO2,
    pub int_set: INT_SET,
    pub pidr4: PIDR4,
    pub pidr5: PIDR5,
    pub pidr6: PIDR6,
    pub pidr7: PIDR7,
    pub pidr0: PIDR0,
    pub pidr1: PIDR1,
    pub pidr2: PIDR2,
    pub pidr3: PIDR3,
    pub cidr0: CIDR0,
    pub cidr1: CIDR1,
    pub cidr2: CIDR2,
    pub cidr3: CIDR3,
    // some fields omitted
}

Register block

Fields

ctrl: CTRL

0x00 - MPC Control register

blk_max: BLK_MAX

0x10 - Maximum value of block based index register

blk_cfg: BLK_CFG

0x14 - Block Configuration

blk_idx: BLK_IDX

0x18 - Index value for accessing block based look up table

blk_lut: BLK_LUT

0x1c - Block based gating Look Up Table

int_stat: INT_STAT

0x20 - Interrupt state

int_clear: INT_CLEAR

0x24 - Interrupt clear

int_en: INT_EN

0x28 - Interrupt enable

int_info1: INT_INFO1

0x2c - Interrupt information 1

int_info2: INT_INFO2

0x30 - Interrupt information 2

int_set: INT_SET

0x34 - Interrupt set. Debug purpose only

pidr4: PIDR4

0xfd0 - Peripheral ID 4

pidr5: PIDR5

0xfd4 - Peripheral ID 5

pidr6: PIDR6

0xfd8 - Peripheral ID 6

pidr7: PIDR7

0xfdc - Peripheral ID 7

pidr0: PIDR0

0xfe0 - Peripheral ID 0

pidr1: PIDR1

0xfe4 - Peripheral ID 1

pidr2: PIDR2

0xfe8 - Peripheral ID 2

pidr3: PIDR3

0xfec - Peripheral ID 3

cidr0: CIDR0

0xff0 - Component ID 0

cidr1: CIDR1

0xff4 - Component ID 1

cidr2: CIDR2

0xff8 - Component ID 2

cidr3: CIDR3

0xffc - Component ID 3

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