Type Definition muscab1_pac::spctrl::SECMSCINTEN

type SECMSCINTEN = Reg<u32, _SECMSCINTEN>;

Secure MSC Interrupt Enable

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see secmscinten module

Trait Implementations

impl Readable for SECMSCINTEN

read() method returns secmscinten::R reader structure

impl Writable for SECMSCINTEN

write(|w| ..) method takes secmscinten::W writer structure

impl ResetValue for SECMSCINTEN

Register SECMSCINTEN reset()'s with value 0

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register