Type Definition muscab1_pac::scc::clk_ctrl_enable::R

type R = R<u32, CLK_CTRL_ENABLE>;

Reader of register CLK_CTRL_ENABLE

Methods

impl R

pub fn ctrl_enable_1hz(&self) -> CTRL_ENABLE_1HZ_R

Bit 0 - 0: Disable; 1: Enable

pub fn ctrl_enable_dapswclk(&self) -> CTRL_ENABLE_DAPSWCLK_R

Bit 1 - 0: Disable; 1: Enable

pub fn ctrl_enable_gpiohclk(&self) -> CTRL_ENABLE_GPIOHCLK_R

Bit 2 - 0: Disable; 1: Enable

pub fn ctrl_enable_i2sclk0(&self) -> CTRL_ENABLE_I2SCLK0_R

Bit 3 - 0: Disable; 1: Enable

pub fn ctrl_enable_i2sclk1(&self) -> CTRL_ENABLE_I2SCLK1_R

Bit 4 - 0: Disable; 1: Enable

pub fn ctrl_enable_i2sclk2(&self) -> CTRL_ENABLE_I2SCLK2_R

Bit 5 - 0: Disable; 1: Enable

pub fn ctrl_enable_mainclk(&self) -> CTRL_ENABLE_MAINCLK_R

Bit 8 - 0: Disable; 1: Enable

pub fn ctrl_enable_qspi_phy_clk(&self) -> CTRL_ENABLE_QSPI_PHY_CLK_R

Bit 9 - 0: Disable; 1: Enable

pub fn ctrl_enable_refclk(&self) -> CTRL_ENABLE_REFCLK_R

Bit 10 - 0: Disable; 1: Enable

pub fn ctrl_enable_rm38kclk(&self) -> CTRL_ENABLE_RM38KCLK_R

Bit 11 - 0: Disable; 1: Enable

pub fn ctrl_enable_sccclk(&self) -> CTRL_ENABLE_SCCCLK_R

Bit 12 - 0: Disable; 1: Enable

pub fn ctrl_enable_sdphyclk(&self) -> CTRL_ENABLE_SDPHYCLK_R

Bit 13 - 0: Disable; 1: Enable

pub fn ctrl_enable_testclk(&self) -> CTRL_ENABLE_TESTCLK_R

Bit 15 - 0: Disable; 1: Enable