muscab1_pac/timer0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Enable\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Enable {
8    #[doc = "0: Timer is disabled"]
9    Disable = 0,
10    #[doc = "1: Timer is enabled"]
11    Enable = 1,
12}
13impl From<Enable> for bool {
14    #[inline(always)]
15    fn from(variant: Enable) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `ENABLE` reader - Enable"]
20pub type EnableR = crate::BitReader<Enable>;
21impl EnableR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Enable {
25        match self.bits {
26            false => Enable::Disable,
27            true => Enable::Enable,
28        }
29    }
30    #[doc = "Timer is disabled"]
31    #[inline(always)]
32    pub fn is_disable(&self) -> bool {
33        *self == Enable::Disable
34    }
35    #[doc = "Timer is enabled"]
36    #[inline(always)]
37    pub fn is_enable(&self) -> bool {
38        *self == Enable::Enable
39    }
40}
41#[doc = "Field `ENABLE` writer - Enable"]
42pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enable>;
43impl<'a, REG> EnableW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Timer is disabled"]
48    #[inline(always)]
49    pub fn disable(self) -> &'a mut crate::W<REG> {
50        self.variant(Enable::Disable)
51    }
52    #[doc = "Timer is enabled"]
53    #[inline(always)]
54    pub fn enable(self) -> &'a mut crate::W<REG> {
55        self.variant(Enable::Enable)
56    }
57}
58#[doc = "External Input as Enable\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum Extin {
61    #[doc = "0: External Input as Enable is disabled"]
62    Disable = 0,
63    #[doc = "1: External Input as Enable is enabled"]
64    Enable = 1,
65}
66impl From<Extin> for bool {
67    #[inline(always)]
68    fn from(variant: Extin) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `EXTIN` reader - External Input as Enable"]
73pub type ExtinR = crate::BitReader<Extin>;
74impl ExtinR {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> Extin {
78        match self.bits {
79            false => Extin::Disable,
80            true => Extin::Enable,
81        }
82    }
83    #[doc = "External Input as Enable is disabled"]
84    #[inline(always)]
85    pub fn is_disable(&self) -> bool {
86        *self == Extin::Disable
87    }
88    #[doc = "External Input as Enable is enabled"]
89    #[inline(always)]
90    pub fn is_enable(&self) -> bool {
91        *self == Extin::Enable
92    }
93}
94#[doc = "Field `EXTIN` writer - External Input as Enable"]
95pub type ExtinW<'a, REG> = crate::BitWriter<'a, REG, Extin>;
96impl<'a, REG> ExtinW<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "External Input as Enable is disabled"]
101    #[inline(always)]
102    pub fn disable(self) -> &'a mut crate::W<REG> {
103        self.variant(Extin::Disable)
104    }
105    #[doc = "External Input as Enable is enabled"]
106    #[inline(always)]
107    pub fn enable(self) -> &'a mut crate::W<REG> {
108        self.variant(Extin::Enable)
109    }
110}
111#[doc = "External Clock Enable\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum Extclk {
114    #[doc = "0: External Clock is disabled"]
115    Disable = 0,
116    #[doc = "1: External Clock is enabled"]
117    Enable = 1,
118}
119impl From<Extclk> for bool {
120    #[inline(always)]
121    fn from(variant: Extclk) -> Self {
122        variant as u8 != 0
123    }
124}
125#[doc = "Field `EXTCLK` reader - External Clock Enable"]
126pub type ExtclkR = crate::BitReader<Extclk>;
127impl ExtclkR {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> Extclk {
131        match self.bits {
132            false => Extclk::Disable,
133            true => Extclk::Enable,
134        }
135    }
136    #[doc = "External Clock is disabled"]
137    #[inline(always)]
138    pub fn is_disable(&self) -> bool {
139        *self == Extclk::Disable
140    }
141    #[doc = "External Clock is enabled"]
142    #[inline(always)]
143    pub fn is_enable(&self) -> bool {
144        *self == Extclk::Enable
145    }
146}
147#[doc = "Field `EXTCLK` writer - External Clock Enable"]
148pub type ExtclkW<'a, REG> = crate::BitWriter<'a, REG, Extclk>;
149impl<'a, REG> ExtclkW<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "External Clock is disabled"]
154    #[inline(always)]
155    pub fn disable(self) -> &'a mut crate::W<REG> {
156        self.variant(Extclk::Disable)
157    }
158    #[doc = "External Clock is enabled"]
159    #[inline(always)]
160    pub fn enable(self) -> &'a mut crate::W<REG> {
161        self.variant(Extclk::Enable)
162    }
163}
164#[doc = "Interrupt Enable\n\nValue on reset: 0"]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum Inten {
167    #[doc = "0: Interrupt is disabled"]
168    Disable = 0,
169    #[doc = "1: Interrupt is enabled"]
170    Enable = 1,
171}
172impl From<Inten> for bool {
173    #[inline(always)]
174    fn from(variant: Inten) -> Self {
175        variant as u8 != 0
176    }
177}
178#[doc = "Field `INTEN` reader - Interrupt Enable"]
179pub type IntenR = crate::BitReader<Inten>;
180impl IntenR {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> Inten {
184        match self.bits {
185            false => Inten::Disable,
186            true => Inten::Enable,
187        }
188    }
189    #[doc = "Interrupt is disabled"]
190    #[inline(always)]
191    pub fn is_disable(&self) -> bool {
192        *self == Inten::Disable
193    }
194    #[doc = "Interrupt is enabled"]
195    #[inline(always)]
196    pub fn is_enable(&self) -> bool {
197        *self == Inten::Enable
198    }
199}
200#[doc = "Field `INTEN` writer - Interrupt Enable"]
201pub type IntenW<'a, REG> = crate::BitWriter<'a, REG, Inten>;
202impl<'a, REG> IntenW<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "Interrupt is disabled"]
207    #[inline(always)]
208    pub fn disable(self) -> &'a mut crate::W<REG> {
209        self.variant(Inten::Disable)
210    }
211    #[doc = "Interrupt is enabled"]
212    #[inline(always)]
213    pub fn enable(self) -> &'a mut crate::W<REG> {
214        self.variant(Inten::Enable)
215    }
216}
217impl R {
218    #[doc = "Bit 0 - Enable"]
219    #[inline(always)]
220    pub fn enable(&self) -> EnableR {
221        EnableR::new((self.bits & 1) != 0)
222    }
223    #[doc = "Bit 1 - External Input as Enable"]
224    #[inline(always)]
225    pub fn extin(&self) -> ExtinR {
226        ExtinR::new(((self.bits >> 1) & 1) != 0)
227    }
228    #[doc = "Bit 2 - External Clock Enable"]
229    #[inline(always)]
230    pub fn extclk(&self) -> ExtclkR {
231        ExtclkR::new(((self.bits >> 2) & 1) != 0)
232    }
233    #[doc = "Bit 3 - Interrupt Enable"]
234    #[inline(always)]
235    pub fn inten(&self) -> IntenR {
236        IntenR::new(((self.bits >> 3) & 1) != 0)
237    }
238}
239impl W {
240    #[doc = "Bit 0 - Enable"]
241    #[inline(always)]
242    pub fn enable(&mut self) -> EnableW<CtrlSpec> {
243        EnableW::new(self, 0)
244    }
245    #[doc = "Bit 1 - External Input as Enable"]
246    #[inline(always)]
247    pub fn extin(&mut self) -> ExtinW<CtrlSpec> {
248        ExtinW::new(self, 1)
249    }
250    #[doc = "Bit 2 - External Clock Enable"]
251    #[inline(always)]
252    pub fn extclk(&mut self) -> ExtclkW<CtrlSpec> {
253        ExtclkW::new(self, 2)
254    }
255    #[doc = "Bit 3 - Interrupt Enable"]
256    #[inline(always)]
257    pub fn inten(&mut self) -> IntenW<CtrlSpec> {
258        IntenW::new(self, 3)
259    }
260}
261#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
262pub struct CtrlSpec;
263impl crate::RegisterSpec for CtrlSpec {
264    type Ux = u32;
265}
266#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
267impl crate::Readable for CtrlSpec {}
268#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
269impl crate::Writable for CtrlSpec {
270    type Safety = crate::Unsafe;
271    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
272    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
273}
274#[doc = "`reset()` method sets CTRL to value 0"]
275impl crate::Resettable for CtrlSpec {
276    const RESET_VALUE: u32 = 0;
277}
muscab1_pac/timer0/ctrl.rs

muscab1_pac/timer0/
ctrl.rs
