muscab1_pac/
timer0.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    ctrl: Ctrl,
5    value: Value,
6    reload: Reload,
7    _reserved_3_intclear: [u8; 0x04],
8}
9impl RegisterBlock {
10    #[doc = "0x00 - Control Register"]
11    #[inline(always)]
12    pub const fn ctrl(&self) -> &Ctrl {
13        &self.ctrl
14    }
15    #[doc = "0x04 - Current Timer Counter Value"]
16    #[inline(always)]
17    pub const fn value(&self) -> &Value {
18        &self.value
19    }
20    #[doc = "0x08 - Counter Reload Value"]
21    #[inline(always)]
22    pub const fn reload(&self) -> &Reload {
23        &self.reload
24    }
25    #[doc = "0x0c - Timer Interrupt clear register"]
26    #[inline(always)]
27    pub const fn intclear(&self) -> &Intclear {
28        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
29    }
30    #[doc = "0x0c - Timer Interrupt status register"]
31    #[inline(always)]
32    pub const fn intstatus(&self) -> &Intstatus {
33        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(12).cast() }
34    }
35}
36#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
37module"]
38#[doc(alias = "CTRL")]
39pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
40#[doc = "Control Register"]
41pub mod ctrl;
42#[doc = "VALUE (rw) register accessor: Current Timer Counter Value\n\nYou can [`read`](crate::Reg::read) this register and get [`value::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`value::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@value`]
43module"]
44#[doc(alias = "VALUE")]
45pub type Value = crate::Reg<value::ValueSpec>;
46#[doc = "Current Timer Counter Value"]
47pub mod value;
48#[doc = "RELOAD (rw) register accessor: Counter Reload Value\n\nYou can [`read`](crate::Reg::read) this register and get [`reload::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reload::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reload`]
49module"]
50#[doc(alias = "RELOAD")]
51pub type Reload = crate::Reg<reload::ReloadSpec>;
52#[doc = "Counter Reload Value"]
53pub mod reload;
54#[doc = "INTSTATUS (r) register accessor: Timer Interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`intstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intstatus`]
55module"]
56#[doc(alias = "INTSTATUS")]
57pub type Intstatus = crate::Reg<intstatus::IntstatusSpec>;
58#[doc = "Timer Interrupt status register"]
59pub mod intstatus;
60#[doc = "INTCLEAR (w) register accessor: Timer Interrupt clear register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intclear::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intclear`]
61module"]
62#[doc(alias = "INTCLEAR")]
63pub type Intclear = crate::Reg<intclear::IntclearSpec>;
64#[doc = "Timer Interrupt clear register"]
65pub mod intclear;
muscab1_pac/timer0.rs

muscab1_pac/
timer0.rs
