muscab1_pac/system_control/
cpuwait.rs

1#[doc = "Register `CPUWAIT` reader"]
2pub type R = crate::R<CpuwaitSpec>;
3#[doc = "Register `CPUWAIT` writer"]
4pub type W = crate::W<CpuwaitSpec>;
5#[doc = "CPU 0 waits at boot and whether CPU1 powers up\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Cpu0wait {
8    #[doc = "0: CPU0 boot normally. From Power ON reset, nSRST reset or Watchdog Reset, CPU 1 powers up"]
9    Normallyorpowerup = 0,
10    #[doc = "1: CPU0 wait. From Power ON reset, nSRST reset or Watchdog Reset, CPU 1 do not power up"]
11    Waitornopowerup = 1,
12}
13impl From<Cpu0wait> for bool {
14    #[inline(always)]
15    fn from(variant: Cpu0wait) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `CPU0WAIT` reader - CPU 0 waits at boot and whether CPU1 powers up"]
20pub type Cpu0waitR = crate::BitReader<Cpu0wait>;
21impl Cpu0waitR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Cpu0wait {
25        match self.bits {
26            false => Cpu0wait::Normallyorpowerup,
27            true => Cpu0wait::Waitornopowerup,
28        }
29    }
30    #[doc = "CPU0 boot normally. From Power ON reset, nSRST reset or Watchdog Reset, CPU 1 powers up"]
31    #[inline(always)]
32    pub fn is_normallyorpowerup(&self) -> bool {
33        *self == Cpu0wait::Normallyorpowerup
34    }
35    #[doc = "CPU0 wait. From Power ON reset, nSRST reset or Watchdog Reset, CPU 1 do not power up"]
36    #[inline(always)]
37    pub fn is_waitornopowerup(&self) -> bool {
38        *self == Cpu0wait::Waitornopowerup
39    }
40}
41#[doc = "Field `CPU0WAIT` writer - CPU 0 waits at boot and whether CPU1 powers up"]
42pub type Cpu0waitW<'a, REG> = crate::BitWriter<'a, REG, Cpu0wait>;
43impl<'a, REG> Cpu0waitW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "CPU0 boot normally. From Power ON reset, nSRST reset or Watchdog Reset, CPU 1 powers up"]
48    #[inline(always)]
49    pub fn normallyorpowerup(self) -> &'a mut crate::W<REG> {
50        self.variant(Cpu0wait::Normallyorpowerup)
51    }
52    #[doc = "CPU0 wait. From Power ON reset, nSRST reset or Watchdog Reset, CPU 1 do not power up"]
53    #[inline(always)]
54    pub fn waitornopowerup(self) -> &'a mut crate::W<REG> {
55        self.variant(Cpu0wait::Waitornopowerup)
56    }
57}
58#[doc = "CPU 1 waits at boot and whether CPU0 powers up\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum Cpu1wait {
61    #[doc = "0: CPU1 boot normally. From Power ON reset, nSRST reset or Watchdog Reset, CPU 0 powers up"]
62    Normallyorpowerup = 0,
63    #[doc = "1: CPU1 wait. From Power ON reset, nSRST reset or Watchdog Reset, CPU 0 do not power up"]
64    Waitornopowerup = 1,
65}
66impl From<Cpu1wait> for bool {
67    #[inline(always)]
68    fn from(variant: Cpu1wait) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `CPU1WAIT` reader - CPU 1 waits at boot and whether CPU0 powers up"]
73pub type Cpu1waitR = crate::BitReader<Cpu1wait>;
74impl Cpu1waitR {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> Cpu1wait {
78        match self.bits {
79            false => Cpu1wait::Normallyorpowerup,
80            true => Cpu1wait::Waitornopowerup,
81        }
82    }
83    #[doc = "CPU1 boot normally. From Power ON reset, nSRST reset or Watchdog Reset, CPU 0 powers up"]
84    #[inline(always)]
85    pub fn is_normallyorpowerup(&self) -> bool {
86        *self == Cpu1wait::Normallyorpowerup
87    }
88    #[doc = "CPU1 wait. From Power ON reset, nSRST reset or Watchdog Reset, CPU 0 do not power up"]
89    #[inline(always)]
90    pub fn is_waitornopowerup(&self) -> bool {
91        *self == Cpu1wait::Waitornopowerup
92    }
93}
94#[doc = "Field `CPU1WAIT` writer - CPU 1 waits at boot and whether CPU0 powers up"]
95pub type Cpu1waitW<'a, REG> = crate::BitWriter<'a, REG, Cpu1wait>;
96impl<'a, REG> Cpu1waitW<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "CPU1 boot normally. From Power ON reset, nSRST reset or Watchdog Reset, CPU 0 powers up"]
101    #[inline(always)]
102    pub fn normallyorpowerup(self) -> &'a mut crate::W<REG> {
103        self.variant(Cpu1wait::Normallyorpowerup)
104    }
105    #[doc = "CPU1 wait. From Power ON reset, nSRST reset or Watchdog Reset, CPU 0 do not power up"]
106    #[inline(always)]
107    pub fn waitornopowerup(self) -> &'a mut crate::W<REG> {
108        self.variant(Cpu1wait::Waitornopowerup)
109    }
110}
111impl R {
112    #[doc = "Bit 0 - CPU 0 waits at boot and whether CPU1 powers up"]
113    #[inline(always)]
114    pub fn cpu0wait(&self) -> Cpu0waitR {
115        Cpu0waitR::new((self.bits & 1) != 0)
116    }
117    #[doc = "Bit 1 - CPU 1 waits at boot and whether CPU0 powers up"]
118    #[inline(always)]
119    pub fn cpu1wait(&self) -> Cpu1waitR {
120        Cpu1waitR::new(((self.bits >> 1) & 1) != 0)
121    }
122}
123impl W {
124    #[doc = "Bit 0 - CPU 0 waits at boot and whether CPU1 powers up"]
125    #[inline(always)]
126    pub fn cpu0wait(&mut self) -> Cpu0waitW<CpuwaitSpec> {
127        Cpu0waitW::new(self, 0)
128    }
129    #[doc = "Bit 1 - CPU 1 waits at boot and whether CPU0 powers up"]
130    #[inline(always)]
131    pub fn cpu1wait(&mut self) -> Cpu1waitW<CpuwaitSpec> {
132        Cpu1waitW::new(self, 1)
133    }
134}
135#[doc = "CPU Boot wait control after reset\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuwait::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpuwait::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
136pub struct CpuwaitSpec;
137impl crate::RegisterSpec for CpuwaitSpec {
138    type Ux = u32;
139}
140#[doc = "`read()` method returns [`cpuwait::R`](R) reader structure"]
141impl crate::Readable for CpuwaitSpec {}
142#[doc = "`write(|w| ..)` method takes [`cpuwait::W`](W) writer structure"]
143impl crate::Writable for CpuwaitSpec {
144    type Safety = crate::Unsafe;
145    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
146    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
147}
148#[doc = "`reset()` method sets CPUWAIT to value 0"]
149impl crate::Resettable for CpuwaitSpec {
150    const RESET_VALUE: u32 = 0;
151}
muscab1_pac/system_control/cpuwait.rs

muscab1_pac/system_control/
cpuwait.rs
