1#![doc = "Peripheral access API for MSPM0L222X microcontrollers (generated using svd2rust v0.37.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
2#![allow(non_camel_case_types)]
3#![allow(non_snake_case)]
4#![no_std]
5#![cfg_attr(docsrs, feature(doc_cfg))]
6#[doc = r"Number available in the NVIC for configuring priority"]
7pub const NVIC_PRIO_BITS: u8 = 3;
8pub use cortex_m::peripheral::Peripherals as CorePeripherals;
9pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU};
10#[allow(unused_imports)]
11use generic::*;
12#[doc = r"Common register and bit access and modify traits"]
13pub mod generic;
14#[cfg(feature = "rt")]
15extern "C" {
16 fn INT_GROUP0();
17 fn INT_GROUP1();
18 fn TIMG12();
19 fn UART4();
20 fn ADC0();
21 fn SPI0();
22 fn SPI1();
23 fn UART2();
24 fn UART3();
25 fn UART0();
26 fn UART1();
27 fn TIMA0();
28 fn TIMG8();
29 fn TIMG0();
30 fn TIMG4();
31 fn TIMG5();
32 fn I2C0();
33 fn I2C1();
34 fn I2C2();
35 fn AESADV();
36 fn LCD0();
37 fn LFSS();
38 fn DMA0();
39}
40#[doc(hidden)]
41#[repr(C)]
42pub union Vector {
43 _handler: unsafe extern "C" fn(),
44 _reserved: u32,
45}
46#[cfg(feature = "rt")]
47#[doc(hidden)]
48#[link_section = ".vector_table.interrupts"]
49#[no_mangle]
50pub static __INTERRUPTS: [Vector; 32] = [
51 Vector {
52 _handler: INT_GROUP0,
53 },
54 Vector {
55 _handler: INT_GROUP1,
56 },
57 Vector { _handler: TIMG12 },
58 Vector { _handler: UART4 },
59 Vector { _handler: ADC0 },
60 Vector { _reserved: 0 },
61 Vector { _reserved: 0 },
62 Vector { _reserved: 0 },
63 Vector { _reserved: 0 },
64 Vector { _handler: SPI0 },
65 Vector { _handler: SPI1 },
66 Vector { _reserved: 0 },
67 Vector { _reserved: 0 },
68 Vector { _handler: UART2 },
69 Vector { _handler: UART3 },
70 Vector { _handler: UART0 },
71 Vector { _handler: UART1 },
72 Vector { _reserved: 0 },
73 Vector { _handler: TIMA0 },
74 Vector { _reserved: 0 },
75 Vector { _handler: TIMG8 },
76 Vector { _handler: TIMG0 },
77 Vector { _handler: TIMG4 },
78 Vector { _handler: TIMG5 },
79 Vector { _handler: I2C0 },
80 Vector { _handler: I2C1 },
81 Vector { _handler: I2C2 },
82 Vector { _reserved: 0 },
83 Vector { _handler: AESADV },
84 Vector { _handler: LCD0 },
85 Vector { _handler: LFSS },
86 Vector { _handler: DMA0 },
87];
88#[doc = r"Enumeration of all the interrupts."]
89#[derive(Copy, Clone, Debug, PartialEq, Eq)]
90#[repr(u16)]
91pub enum Interrupt {
92 #[doc = "0 - SYSCTL interrupt (group 0, IIDX 6)"]
93 INT_GROUP0 = 0,
94 #[doc = "1 - GPIOC interrupt (group 1, IIDX 6)"]
95 INT_GROUP1 = 1,
96 #[doc = "2 - TIMG12"]
97 TIMG12 = 2,
98 #[doc = "3 - UART4"]
99 UART4 = 3,
100 #[doc = "4 - ADC0"]
101 ADC0 = 4,
102 #[doc = "9 - SPI0"]
103 SPI0 = 9,
104 #[doc = "10 - SPI1"]
105 SPI1 = 10,
106 #[doc = "13 - UART2"]
107 UART2 = 13,
108 #[doc = "14 - UART3"]
109 UART3 = 14,
110 #[doc = "15 - UART0"]
111 UART0 = 15,
112 #[doc = "16 - UART1"]
113 UART1 = 16,
114 #[doc = "18 - TIMA0"]
115 TIMA0 = 18,
116 #[doc = "20 - TIMG8"]
117 TIMG8 = 20,
118 #[doc = "21 - TIMG0"]
119 TIMG0 = 21,
120 #[doc = "22 - TIMG4"]
121 TIMG4 = 22,
122 #[doc = "23 - TIMG5"]
123 TIMG5 = 23,
124 #[doc = "24 - I2C0"]
125 I2C0 = 24,
126 #[doc = "25 - I2C1"]
127 I2C1 = 25,
128 #[doc = "26 - I2C2"]
129 I2C2 = 26,
130 #[doc = "28 - AESADV"]
131 AESADV = 28,
132 #[doc = "29 - LCD0"]
133 LCD0 = 29,
134 #[doc = "30 - LFSS"]
135 LFSS = 30,
136 #[doc = "31 - DMA0"]
137 DMA0 = 31,
138}
139unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
140 #[inline(always)]
141 fn number(self) -> u16 {
142 self as u16
143 }
144}
145#[doc = "DSSM"]
146pub type Debugss = crate::Periph<debugss::RegisterBlock, 0x400c_7000>;
147impl core::fmt::Debug for Debugss {
148 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
149 f.debug_struct("Debugss").finish()
150 }
151}
152#[doc = "DSSM"]
153pub mod debugss;
154#[doc = "PERIPHERALREGION"]
155pub type Comp0 = crate::Periph<comp0::RegisterBlock, 0x4000_8000>;
156impl core::fmt::Debug for Comp0 {
157 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
158 f.debug_struct("Comp0").finish()
159 }
160}
161#[doc = "PERIPHERALREGION"]
162pub mod comp0;
163#[doc = "WWDT"]
164pub type Wwdt0 = crate::Periph<wwdt0::RegisterBlock, 0x4008_0000>;
165impl core::fmt::Debug for Wwdt0 {
166 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
167 f.debug_struct("Wwdt0").finish()
168 }
169}
170#[doc = "WWDT"]
171pub mod wwdt0;
172#[doc = "PERIPHERALREGION"]
173pub type I2c1 = crate::Periph<i2c1::RegisterBlock, 0x400f_2000>;
174impl core::fmt::Debug for I2c1 {
175 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
176 f.debug_struct("I2c1").finish()
177 }
178}
179#[doc = "PERIPHERALREGION"]
180pub mod i2c1;
181#[doc = "PERIPHERALREGION"]
182pub type Eventlp = crate::Periph<eventlp::RegisterBlock, 0x400c_9000>;
183impl core::fmt::Debug for Eventlp {
184 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
185 f.debug_struct("Eventlp").finish()
186 }
187}
188#[doc = "PERIPHERALREGION"]
189pub mod eventlp;
190#[doc = "PERIPHERALREGION"]
191pub type Uart0 = crate::Periph<uart0::RegisterBlock, 0x4010_8000>;
192impl core::fmt::Debug for Uart0 {
193 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
194 f.debug_struct("Uart0").finish()
195 }
196}
197#[doc = "PERIPHERALREGION"]
198pub mod uart0;
199#[doc = "PERIPHERALREGION"]
200pub type Gpioa = crate::Periph<gpioa::RegisterBlock, 0x400a_0000>;
201impl core::fmt::Debug for Gpioa {
202 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
203 f.debug_struct("Gpioa").finish()
204 }
205}
206#[doc = "PERIPHERALREGION"]
207pub mod gpioa;
208#[doc = "PERIPHERALREGION"]
209pub type I2c0 = crate::Periph<i2c0::RegisterBlock, 0x400f_0000>;
210impl core::fmt::Debug for I2c0 {
211 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
212 f.debug_struct("I2c0").finish()
213 }
214}
215#[doc = "PERIPHERALREGION"]
216pub mod i2c0;
217#[doc = "PERIPHERALREGION"]
218pub type Uart2 = crate::Periph<uart2::RegisterBlock, 0x4010_0000>;
219impl core::fmt::Debug for Uart2 {
220 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
221 f.debug_struct("Uart2").finish()
222 }
223}
224#[doc = "PERIPHERALREGION"]
225pub mod uart2;
226#[doc = "PERIPHERALREGION"]
227pub type Adc0 = crate::Periph<adc0::RegisterBlock, 0x4000_4000>;
228impl core::fmt::Debug for Adc0 {
229 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
230 f.debug_struct("Adc0").finish()
231 }
232}
233#[doc = "PERIPHERALREGION"]
234pub mod adc0;
235#[doc = "PERIPHERALREGIONSVT"]
236pub type Adc0Svt = crate::Periph<adc0_svt::RegisterBlock, 0x4055_a000>;
237impl core::fmt::Debug for Adc0Svt {
238 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
239 f.debug_struct("Adc0Svt").finish()
240 }
241}
242#[doc = "PERIPHERALREGIONSVT"]
243pub mod adc0_svt;
244#[doc = "PERIPHERALREGION"]
245pub type Spi0 = crate::Periph<spi0::RegisterBlock, 0x4046_8000>;
246impl core::fmt::Debug for Spi0 {
247 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
248 f.debug_struct("Spi0").finish()
249 }
250}
251#[doc = "PERIPHERALREGION"]
252pub mod spi0;
253#[doc = "PERIPHERALREGION"]
254pub type Vref = crate::Periph<vref::RegisterBlock, 0x4003_0000>;
255impl core::fmt::Debug for Vref {
256 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
257 f.debug_struct("Vref").finish()
258 }
259}
260#[doc = "PERIPHERALREGION"]
261pub mod vref;
262#[doc = "PERIPHERALREGION"]
263pub type Spi1 = crate::Periph<spi1::RegisterBlock, 0x4046_a000>;
264impl core::fmt::Debug for Spi1 {
265 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
266 f.debug_struct("Spi1").finish()
267 }
268}
269#[doc = "PERIPHERALREGION"]
270pub mod spi1;
271#[doc = "PERIPHERALREGION"]
272pub type Keystorectl = crate::Periph<keystorectl::RegisterBlock, 0x400a_c000>;
273impl core::fmt::Debug for Keystorectl {
274 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
275 f.debug_struct("Keystorectl").finish()
276 }
277}
278#[doc = "PERIPHERALREGION"]
279pub mod keystorectl;
280#[doc = "PERIPHERALREGION"]
281pub type Trng = crate::Periph<trng::RegisterBlock, 0x4044_4000>;
282impl core::fmt::Debug for Trng {
283 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
284 f.debug_struct("Trng").finish()
285 }
286}
287#[doc = "PERIPHERALREGION"]
288pub mod trng;
289#[doc = "PERIPHERALREGION"]
290pub type Uart3 = crate::Periph<uart3::RegisterBlock, 0x4010_2000>;
291impl core::fmt::Debug for Uart3 {
292 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
293 f.debug_struct("Uart3").finish()
294 }
295}
296#[doc = "PERIPHERALREGION"]
297pub mod uart3;
298#[doc = "PERIPHERALREGION"]
299pub type Uart1 = crate::Periph<uart1::RegisterBlock, 0x4010_a000>;
300impl core::fmt::Debug for Uart1 {
301 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
302 f.debug_struct("Uart1").finish()
303 }
304}
305#[doc = "PERIPHERALREGION"]
306pub mod uart1;
307#[doc = "PERIPHERALREGION"]
308pub type Uart4 = crate::Periph<uart4::RegisterBlock, 0x4010_4000>;
309impl core::fmt::Debug for Uart4 {
310 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
311 f.debug_struct("Uart4").finish()
312 }
313}
314#[doc = "PERIPHERALREGION"]
315pub mod uart4;
316#[doc = "PERIPHERALREGION"]
317pub type I2c2 = crate::Periph<i2c2::RegisterBlock, 0x400f_4000>;
318impl core::fmt::Debug for I2c2 {
319 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
320 f.debug_struct("I2c2").finish()
321 }
322}
323#[doc = "PERIPHERALREGION"]
324pub mod i2c2;
325#[doc = "PERIPHERALREGION"]
326pub type Gpiob = crate::Periph<gpiob::RegisterBlock, 0x400a_2000>;
327impl core::fmt::Debug for Gpiob {
328 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
329 f.debug_struct("Gpiob").finish()
330 }
331}
332#[doc = "PERIPHERALREGION"]
333pub mod gpiob;
334#[doc = "PERIPHERALREGION"]
335pub type Gpioc = crate::Periph<gpioc::RegisterBlock, 0x400a_4000>;
336impl core::fmt::Debug for Gpioc {
337 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
338 f.debug_struct("Gpioc").finish()
339 }
340}
341#[doc = "PERIPHERALREGION"]
342pub mod gpioc;
343#[doc = "NVMNW_GANDALF"]
344pub type Flashctl = crate::Periph<flashctl::RegisterBlock, 0x400c_d000>;
345impl core::fmt::Debug for Flashctl {
346 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
347 f.debug_struct("Flashctl").finish()
348 }
349}
350#[doc = "NVMNW_GANDALF"]
351pub mod flashctl;
352#[doc = "PERIPHERALREGION"]
353pub type Aesadv = crate::Periph<aesadv::RegisterBlock, 0x4044_2000>;
354impl core::fmt::Debug for Aesadv {
355 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
356 f.debug_struct("Aesadv").finish()
357 }
358}
359#[doc = "PERIPHERALREGION"]
360pub mod aesadv;
361#[doc = "PERIPHERALREGION"]
362pub type Crcp0 = crate::Periph<crcp0::RegisterBlock, 0x4044_0000>;
363impl core::fmt::Debug for Crcp0 {
364 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
365 f.debug_struct("Crcp0").finish()
366 }
367}
368#[doc = "PERIPHERALREGION"]
369pub mod crcp0;
370#[doc = "PERIPHERALREGION"]
371pub type Timg0 = crate::Periph<timg0::RegisterBlock, 0x4008_4000>;
372impl core::fmt::Debug for Timg0 {
373 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
374 f.debug_struct("Timg0").finish()
375 }
376}
377#[doc = "PERIPHERALREGION"]
378pub mod timg0;
379#[doc = "PERIPHERALREGION"]
380pub type Timg4 = crate::Periph<timg4::RegisterBlock, 0x4008_c000>;
381impl core::fmt::Debug for Timg4 {
382 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
383 f.debug_struct("Timg4").finish()
384 }
385}
386#[doc = "PERIPHERALREGION"]
387pub mod timg4;
388#[doc = "PERIPHERALREGION"]
389pub type Timg8 = crate::Periph<timg8::RegisterBlock, 0x4009_0000>;
390impl core::fmt::Debug for Timg8 {
391 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
392 f.debug_struct("Timg8").finish()
393 }
394}
395#[doc = "PERIPHERALREGION"]
396pub mod timg8;
397#[doc = "PERIPHERALREGION"]
398pub type Timg12 = crate::Periph<timg12::RegisterBlock, 0x4087_0000>;
399impl core::fmt::Debug for Timg12 {
400 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
401 f.debug_struct("Timg12").finish()
402 }
403}
404#[doc = "PERIPHERALREGION"]
405pub mod timg12;
406#[doc = "PERIPHERALREGION"]
407pub type Tima0 = crate::Periph<tima0::RegisterBlock, 0x4086_0000>;
408impl core::fmt::Debug for Tima0 {
409 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
410 f.debug_struct("Tima0").finish()
411 }
412}
413#[doc = "PERIPHERALREGION"]
414pub mod tima0;
415#[doc = "PERIPHERALREGION"]
416pub type Dma = crate::Periph<dma::RegisterBlock, 0x4042_a000>;
417impl core::fmt::Debug for Dma {
418 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
419 f.debug_struct("Dma").finish()
420 }
421}
422#[doc = "PERIPHERALREGION"]
423pub mod dma;
424#[doc = "PERIPHERALREGION"]
425pub type Lfss = crate::Periph<lfss::RegisterBlock, 0x4009_4000>;
426impl core::fmt::Debug for Lfss {
427 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
428 f.debug_struct("Lfss").finish()
429 }
430}
431#[doc = "PERIPHERALREGION"]
432pub mod lfss;
433#[doc = "mem_map"]
434pub type Sysctl = crate::Periph<sysctl::RegisterBlock, 0x400a_f000>;
435impl core::fmt::Debug for Sysctl {
436 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
437 f.debug_struct("Sysctl").finish()
438 }
439}
440#[doc = "mem_map"]
441pub mod sysctl;
442#[doc = "PERIPHERALREGION"]
443pub type Timg5 = crate::Periph<timg5::RegisterBlock, 0x4008_e000>;
444impl core::fmt::Debug for Timg5 {
445 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
446 f.debug_struct("Timg5").finish()
447 }
448}
449#[doc = "PERIPHERALREGION"]
450pub mod timg5;
451#[doc = "PERIPHERALREGION"]
452pub type Iomux = crate::Periph<iomux::RegisterBlock, 0x4042_8000>;
453impl core::fmt::Debug for Iomux {
454 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
455 f.debug_struct("Iomux").finish()
456 }
457}
458#[doc = "PERIPHERALREGION"]
459pub mod iomux;
460#[doc = "PERIPHERALREGION"]
461pub type Lcd = crate::Periph<lcd::RegisterBlock, 0x4007_0000>;
462impl core::fmt::Debug for Lcd {
463 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
464 f.debug_struct("Lcd").finish()
465 }
466}
467#[doc = "PERIPHERALREGION"]
468pub mod lcd;
469#[doc = "CPUSSMMR"]
470pub type Cpuss = crate::Periph<cpuss::RegisterBlock, 0x4040_0000>;
471impl core::fmt::Debug for Cpuss {
472 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
473 f.debug_struct("Cpuss").finish()
474 }
475}
476#[doc = "CPUSSMMR"]
477pub mod cpuss;
478#[doc = "PERIPHERALREGION"]
479pub type Wuc = crate::Periph<wuc::RegisterBlock, 0x4042_4000>;
480impl core::fmt::Debug for Wuc {
481 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
482 f.debug_struct("Wuc").finish()
483 }
484}
485#[doc = "PERIPHERALREGION"]
486pub mod wuc;
487#[no_mangle]
488static mut DEVICE_PERIPHERALS: bool = false;
489#[doc = r" All the peripherals."]
490#[allow(non_snake_case)]
491pub struct Peripherals {
492 #[doc = "DEBUGSS"]
493 pub debugss: Debugss,
494 #[doc = "COMP0"]
495 pub comp0: Comp0,
496 #[doc = "WWDT0"]
497 pub wwdt0: Wwdt0,
498 #[doc = "I2C1"]
499 pub i2c1: I2c1,
500 #[doc = "EVENTLP"]
501 pub eventlp: Eventlp,
502 #[doc = "UART0"]
503 pub uart0: Uart0,
504 #[doc = "GPIOA"]
505 pub gpioa: Gpioa,
506 #[doc = "I2C0"]
507 pub i2c0: I2c0,
508 #[doc = "UART2"]
509 pub uart2: Uart2,
510 #[doc = "ADC0"]
511 pub adc0: Adc0,
512 #[doc = "ADC0_SVT"]
513 pub adc0_svt: Adc0Svt,
514 #[doc = "SPI0"]
515 pub spi0: Spi0,
516 #[doc = "VREF"]
517 pub vref: Vref,
518 #[doc = "SPI1"]
519 pub spi1: Spi1,
520 #[doc = "KEYSTORECTL"]
521 pub keystorectl: Keystorectl,
522 #[doc = "TRNG"]
523 pub trng: Trng,
524 #[doc = "UART3"]
525 pub uart3: Uart3,
526 #[doc = "UART1"]
527 pub uart1: Uart1,
528 #[doc = "UART4"]
529 pub uart4: Uart4,
530 #[doc = "I2C2"]
531 pub i2c2: I2c2,
532 #[doc = "GPIOB"]
533 pub gpiob: Gpiob,
534 #[doc = "GPIOC"]
535 pub gpioc: Gpioc,
536 #[doc = "FLASHCTL"]
537 pub flashctl: Flashctl,
538 #[doc = "AESADV"]
539 pub aesadv: Aesadv,
540 #[doc = "CRCP0"]
541 pub crcp0: Crcp0,
542 #[doc = "TIMG0"]
543 pub timg0: Timg0,
544 #[doc = "TIMG4"]
545 pub timg4: Timg4,
546 #[doc = "TIMG8"]
547 pub timg8: Timg8,
548 #[doc = "TIMG12"]
549 pub timg12: Timg12,
550 #[doc = "TIMA0"]
551 pub tima0: Tima0,
552 #[doc = "DMA"]
553 pub dma: Dma,
554 #[doc = "LFSS"]
555 pub lfss: Lfss,
556 #[doc = "SYSCTL"]
557 pub sysctl: Sysctl,
558 #[doc = "TIMG5"]
559 pub timg5: Timg5,
560 #[doc = "IOMUX"]
561 pub iomux: Iomux,
562 #[doc = "LCD"]
563 pub lcd: Lcd,
564 #[doc = "CPUSS"]
565 pub cpuss: Cpuss,
566 #[doc = "WUC"]
567 pub wuc: Wuc,
568}
569impl Peripherals {
570 #[doc = r" Returns all the peripherals *once*."]
571 #[cfg(feature = "critical-section")]
572 #[inline]
573 pub fn take() -> Option<Self> {
574 critical_section::with(|_| {
575 if unsafe { DEVICE_PERIPHERALS } {
576 return None;
577 }
578 Some(unsafe { Peripherals::steal() })
579 })
580 }
581 #[doc = r" Unchecked version of `Peripherals::take`."]
582 #[doc = r""]
583 #[doc = r" # Safety"]
584 #[doc = r""]
585 #[doc = r" Each of the returned peripherals must be used at most once."]
586 #[inline]
587 pub unsafe fn steal() -> Self {
588 DEVICE_PERIPHERALS = true;
589 Peripherals {
590 debugss: Debugss::steal(),
591 comp0: Comp0::steal(),
592 wwdt0: Wwdt0::steal(),
593 i2c1: I2c1::steal(),
594 eventlp: Eventlp::steal(),
595 uart0: Uart0::steal(),
596 gpioa: Gpioa::steal(),
597 i2c0: I2c0::steal(),
598 uart2: Uart2::steal(),
599 adc0: Adc0::steal(),
600 adc0_svt: Adc0Svt::steal(),
601 spi0: Spi0::steal(),
602 vref: Vref::steal(),
603 spi1: Spi1::steal(),
604 keystorectl: Keystorectl::steal(),
605 trng: Trng::steal(),
606 uart3: Uart3::steal(),
607 uart1: Uart1::steal(),
608 uart4: Uart4::steal(),
609 i2c2: I2c2::steal(),
610 gpiob: Gpiob::steal(),
611 gpioc: Gpioc::steal(),
612 flashctl: Flashctl::steal(),
613 aesadv: Aesadv::steal(),
614 crcp0: Crcp0::steal(),
615 timg0: Timg0::steal(),
616 timg4: Timg4::steal(),
617 timg8: Timg8::steal(),
618 timg12: Timg12::steal(),
619 tima0: Tima0::steal(),
620 dma: Dma::steal(),
621 lfss: Lfss::steal(),
622 sysctl: Sysctl::steal(),
623 timg5: Timg5::steal(),
624 iomux: Iomux::steal(),
625 lcd: Lcd::steal(),
626 cpuss: Cpuss::steal(),
627 wuc: Wuc::steal(),
628 }
629 }
630}