mspm0l130x/debugss/
rxctl.rs1# [doc = "Register `RXCTL` reader"] pub type R = crate :: R < RXCTL_SPEC > ; # [doc = "Register `RXCTL` writer"] pub type W = crate :: W < RXCTL_SPEC > ; # [doc = "Field `RXCTL_RECEIVE` reader - Indicates SW write to the DSSM.RXD register. A read of the DSSM.RXD register by SWD Access Port will clear the RX field."] pub type RXCTL_RECEIVE_R = crate :: BitReader < RXCTL_RECEIVE_A > ; # [doc = "Indicates SW write to the DSSM.RXD register. A read of the DSSM.RXD register by SWD Access Port will clear the RX field.\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum RXCTL_RECEIVE_A { # [doc = "0: EMPTY"] RXCTL_RECEIVE_EMPTY = 0 , # [doc = "1: FULL"] RXCTL_RECEIVE_FULL = 1 , } impl From < RXCTL_RECEIVE_A > for bool { # [inline (always)] fn from (variant : RXCTL_RECEIVE_A) -> Self { variant as u8 != 0 } } impl RXCTL_RECEIVE_R { # [doc = "Get enumerated values variant"] # [inline (always)] pub const fn variant (& self) -> RXCTL_RECEIVE_A { match self . bits { false => RXCTL_RECEIVE_A :: RXCTL_RECEIVE_EMPTY , true => RXCTL_RECEIVE_A :: RXCTL_RECEIVE_FULL , } } # [doc = "EMPTY"] # [inline (always)] pub fn is_rxctl_receive_empty (& self) -> bool { * self == RXCTL_RECEIVE_A :: RXCTL_RECEIVE_EMPTY } # [doc = "FULL"] # [inline (always)] pub fn is_rxctl_receive_full (& self) -> bool { * self == RXCTL_RECEIVE_A :: RXCTL_RECEIVE_FULL } } # [doc = "Field `RXCTL_RECEIVE_FLAGS` reader - Generic RX flags that can be set by SW and read by external debug tool. Functionality is defined by SW."] pub type RXCTL_RECEIVE_FLAGS_R = crate :: FieldReader ; # [doc = "Field `RXCTL_RECEIVE_FLAGS` writer - Generic RX flags that can be set by SW and read by external debug tool. Functionality is defined by SW."] pub type RXCTL_RECEIVE_FLAGS_W < 'a , REG , const O : u8 > = crate :: FieldWriter < 'a , REG , 7 , O > ; impl R { # [doc = "Bit 0 - Indicates SW write to the DSSM.RXD register. A read of the DSSM.RXD register by SWD Access Port will clear the RX field."] # [inline (always)] pub fn rxctl_receive (& self) -> RXCTL_RECEIVE_R { RXCTL_RECEIVE_R :: new ((self . bits & 1) != 0) } # [doc = "Bits 1:7 - Generic RX flags that can be set by SW and read by external debug tool. Functionality is defined by SW."] # [inline (always)] pub fn rxctl_receive_flags (& self) -> RXCTL_RECEIVE_FLAGS_R { RXCTL_RECEIVE_FLAGS_R :: new (((self . bits >> 1) & 0x7f) as u8) } } impl W { # [doc = "Bits 1:7 - Generic RX flags that can be set by SW and read by external debug tool. Functionality is defined by SW."] # [inline (always)] # [must_use] pub fn rxctl_receive_flags (& mut self) -> RXCTL_RECEIVE_FLAGS_W < RXCTL_SPEC , 1 > { RXCTL_RECEIVE_FLAGS_W :: new (self) } # [doc = r" Writes raw bits to the register."] # [doc = r""] # [doc = r" # Safety"] # [doc = r""] # [doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . bits = bits ; self } } # [doc = "Receive control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rxctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RXCTL_SPEC ; impl crate :: RegisterSpec for RXCTL_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [`rxctl::R`](R) reader structure"] impl crate :: Readable for RXCTL_SPEC { } # [doc = "`write(|w| ..)` method takes [`rxctl::W`](W) writer structure"] impl crate :: Writable for RXCTL_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP : Self :: Ux = 0 ; const ONE_TO_MODIFY_FIELDS_BITMAP : Self :: Ux = 0 ; } # [doc = "`reset()` method sets RXCTL to value 0"] impl crate :: Resettable for RXCTL_SPEC { const RESET_VALUE : Self :: Ux = 0 ; }