mspm0l130x/i2c0/

int_event1_mis.rs

# [doc = "Register `INT_EVENT1_MIS` reader"] pub type R = crate :: R < INT_EVENT1_MIS_SPEC > ; # [doc = "Field `INT_EVENT1_MIS_MRXFIFOTRG` reader - Master Receive FIFO Trigger Trigger when RX FIFO contains &amp;gt;= defined bytes"] pub type INT_EVENT1_MIS_MRXFIFOTRG_R = crate :: BitReader < INT_EVENT1_MIS_MRXFIFOTRG_A > ; # [doc = "Master Receive FIFO Trigger Trigger when RX FIFO contains &amp;gt;= defined bytes\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum INT_EVENT1_MIS_MRXFIFOTRG_A { # [doc = "0: CLR"] INT_EVENT1_MIS_MRXFIFOTRG_CLR = 0 , # [doc = "1: SET"] INT_EVENT1_MIS_MRXFIFOTRG_SET = 1 , } impl From < INT_EVENT1_MIS_MRXFIFOTRG_A > for bool { # [inline (always)] fn from (variant : INT_EVENT1_MIS_MRXFIFOTRG_A) -> Self { variant as u8 != 0 } } impl INT_EVENT1_MIS_MRXFIFOTRG_R { # [doc = "Get enumerated values variant"] # [inline (always)] pub const fn variant (& self) -> INT_EVENT1_MIS_MRXFIFOTRG_A { match self . bits { false => INT_EVENT1_MIS_MRXFIFOTRG_A :: INT_EVENT1_MIS_MRXFIFOTRG_CLR , true => INT_EVENT1_MIS_MRXFIFOTRG_A :: INT_EVENT1_MIS_MRXFIFOTRG_SET , } } # [doc = "CLR"] # [inline (always)] pub fn is_int_event1_mis_mrxfifotrg_clr (& self) -> bool { * self == INT_EVENT1_MIS_MRXFIFOTRG_A :: INT_EVENT1_MIS_MRXFIFOTRG_CLR } # [doc = "SET"] # [inline (always)] pub fn is_int_event1_mis_mrxfifotrg_set (& self) -> bool { * self == INT_EVENT1_MIS_MRXFIFOTRG_A :: INT_EVENT1_MIS_MRXFIFOTRG_SET } } # [doc = "Field `INT_EVENT1_MIS_MTXFIFOTRG` reader - Master Transmit FIFO Trigger Trigger when Transmit FIFO contains &amp;lt;= defined bytes"] pub type INT_EVENT1_MIS_MTXFIFOTRG_R = crate :: BitReader < INT_EVENT1_MIS_MTXFIFOTRG_A > ; # [doc = "Master Transmit FIFO Trigger Trigger when Transmit FIFO contains &amp;lt;= defined bytes\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum INT_EVENT1_MIS_MTXFIFOTRG_A { # [doc = "0: CLR"] INT_EVENT1_MIS_MTXFIFOTRG_CLR = 0 , # [doc = "1: SET"] INT_EVENT1_MIS_MTXFIFOTRG_SET = 1 , } impl From < INT_EVENT1_MIS_MTXFIFOTRG_A > for bool { # [inline (always)] fn from (variant : INT_EVENT1_MIS_MTXFIFOTRG_A) -> Self { variant as u8 != 0 } } impl INT_EVENT1_MIS_MTXFIFOTRG_R { # [doc = "Get enumerated values variant"] # [inline (always)] pub const fn variant (& self) -> INT_EVENT1_MIS_MTXFIFOTRG_A { match self . bits { false => INT_EVENT1_MIS_MTXFIFOTRG_A :: INT_EVENT1_MIS_MTXFIFOTRG_CLR , true => INT_EVENT1_MIS_MTXFIFOTRG_A :: INT_EVENT1_MIS_MTXFIFOTRG_SET , } } # [doc = "CLR"] # [inline (always)] pub fn is_int_event1_mis_mtxfifotrg_clr (& self) -> bool { * self == INT_EVENT1_MIS_MTXFIFOTRG_A :: INT_EVENT1_MIS_MTXFIFOTRG_CLR } # [doc = "SET"] # [inline (always)] pub fn is_int_event1_mis_mtxfifotrg_set (& self) -> bool { * self == INT_EVENT1_MIS_MTXFIFOTRG_A :: INT_EVENT1_MIS_MTXFIFOTRG_SET } } # [doc = "Field `INT_EVENT1_MIS_SRXFIFOTRG` reader - Slave Receive FIFO Trigger"] pub type INT_EVENT1_MIS_SRXFIFOTRG_R = crate :: BitReader < INT_EVENT1_MIS_SRXFIFOTRG_A > ; # [doc = "Slave Receive FIFO Trigger\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum INT_EVENT1_MIS_SRXFIFOTRG_A { # [doc = "0: CLR"] INT_EVENT1_MIS_SRXFIFOTRG_CLR = 0 , # [doc = "1: SET"] INT_EVENT1_MIS_SRXFIFOTRG_SET = 1 , } impl From < INT_EVENT1_MIS_SRXFIFOTRG_A > for bool { # [inline (always)] fn from (variant : INT_EVENT1_MIS_SRXFIFOTRG_A) -> Self { variant as u8 != 0 } } impl INT_EVENT1_MIS_SRXFIFOTRG_R { # [doc = "Get enumerated values variant"] # [inline (always)] pub const fn variant (& self) -> INT_EVENT1_MIS_SRXFIFOTRG_A { match self . bits { false => INT_EVENT1_MIS_SRXFIFOTRG_A :: INT_EVENT1_MIS_SRXFIFOTRG_CLR , true => INT_EVENT1_MIS_SRXFIFOTRG_A :: INT_EVENT1_MIS_SRXFIFOTRG_SET , } } # [doc = "CLR"] # [inline (always)] pub fn is_int_event1_mis_srxfifotrg_clr (& self) -> bool { * self == INT_EVENT1_MIS_SRXFIFOTRG_A :: INT_EVENT1_MIS_SRXFIFOTRG_CLR } # [doc = "SET"] # [inline (always)] pub fn is_int_event1_mis_srxfifotrg_set (& self) -> bool { * self == INT_EVENT1_MIS_SRXFIFOTRG_A :: INT_EVENT1_MIS_SRXFIFOTRG_SET } } # [doc = "Field `INT_EVENT1_MIS_STXFIFOTRG` reader - Slave Transmit FIFO Trigger"] pub type INT_EVENT1_MIS_STXFIFOTRG_R = crate :: BitReader < INT_EVENT1_MIS_STXFIFOTRG_A > ; # [doc = "Slave Transmit FIFO Trigger\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum INT_EVENT1_MIS_STXFIFOTRG_A { # [doc = "0: CLR"] INT_EVENT1_MIS_STXFIFOTRG_CLR = 0 , # [doc = "1: SET"] INT_EVENT1_MIS_STXFIFOTRG_SET = 1 , } impl From < INT_EVENT1_MIS_STXFIFOTRG_A > for bool { # [inline (always)] fn from (variant : INT_EVENT1_MIS_STXFIFOTRG_A) -> Self { variant as u8 != 0 } } impl INT_EVENT1_MIS_STXFIFOTRG_R { # [doc = "Get enumerated values variant"] # [inline (always)] pub const fn variant (& self) -> INT_EVENT1_MIS_STXFIFOTRG_A { match self . bits { false => INT_EVENT1_MIS_STXFIFOTRG_A :: INT_EVENT1_MIS_STXFIFOTRG_CLR , true => INT_EVENT1_MIS_STXFIFOTRG_A :: INT_EVENT1_MIS_STXFIFOTRG_SET , } } # [doc = "CLR"] # [inline (always)] pub fn is_int_event1_mis_stxfifotrg_clr (& self) -> bool { * self == INT_EVENT1_MIS_STXFIFOTRG_A :: INT_EVENT1_MIS_STXFIFOTRG_CLR } # [doc = "SET"] # [inline (always)] pub fn is_int_event1_mis_stxfifotrg_set (& self) -> bool { * self == INT_EVENT1_MIS_STXFIFOTRG_A :: INT_EVENT1_MIS_STXFIFOTRG_SET } } impl R { # [doc = "Bit 0 - Master Receive FIFO Trigger Trigger when RX FIFO contains &amp;gt;= defined bytes"] # [inline (always)] pub fn int_event1_mis_mrxfifotrg (& self) -> INT_EVENT1_MIS_MRXFIFOTRG_R { INT_EVENT1_MIS_MRXFIFOTRG_R :: new ((self . bits & 1) != 0) } # [doc = "Bit 1 - Master Transmit FIFO Trigger Trigger when Transmit FIFO contains &amp;lt;= defined bytes"] # [inline (always)] pub fn int_event1_mis_mtxfifotrg (& self) -> INT_EVENT1_MIS_MTXFIFOTRG_R { INT_EVENT1_MIS_MTXFIFOTRG_R :: new (((self . bits >> 1) & 1) != 0) } # [doc = "Bit 2 - Slave Receive FIFO Trigger"] # [inline (always)] pub fn int_event1_mis_srxfifotrg (& self) -> INT_EVENT1_MIS_SRXFIFOTRG_R { INT_EVENT1_MIS_SRXFIFOTRG_R :: new (((self . bits >> 2) & 1) != 0) } # [doc = "Bit 3 - Slave Transmit FIFO Trigger"] # [inline (always)] pub fn int_event1_mis_stxfifotrg (& self) -> INT_EVENT1_MIS_STXFIFOTRG_R { INT_EVENT1_MIS_STXFIFOTRG_R :: new (((self . bits >> 3) & 1) != 0) } } # [doc = "Masked interrupt status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_event1_mis::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct INT_EVENT1_MIS_SPEC ; impl crate :: RegisterSpec for INT_EVENT1_MIS_SPEC { type Ux = u32 ; } # [doc = "`read()` method returns [`int_event1_mis::R`](R) reader structure"] impl crate :: Readable for INT_EVENT1_MIS_SPEC { } # [doc = "`reset()` method sets INT_EVENT1_MIS to value 0"] impl crate :: Resettable for INT_EVENT1_MIS_SPEC { const RESET_VALUE : Self :: Ux = 0 ; }