mspm0l130x/opa0/
rstctl.rs1# [doc = "Register `RSTCTL` writer"] pub type W = crate :: W < RSTCTL_SPEC > ; # [doc = "Assert reset to the peripheral\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum RSTCTL_RESETASSERT_AW { # [doc = "0: NOP"] RSTCTL_RESETASSERT_NOP = 0 , # [doc = "1: ASSERT"] RSTCTL_RESETASSERT_ASSERT = 1 , } impl From < RSTCTL_RESETASSERT_AW > for bool { # [inline (always)] fn from (variant : RSTCTL_RESETASSERT_AW) -> Self { variant as u8 != 0 } } # [doc = "Field `RSTCTL_RESETASSERT` writer - Assert reset to the peripheral"] pub type RSTCTL_RESETASSERT_W < 'a , REG , const O : u8 > = crate :: BitWriter < 'a , REG , O , RSTCTL_RESETASSERT_AW > ; impl < 'a , REG , const O : u8 > RSTCTL_RESETASSERT_W < 'a , REG , O > where REG : crate :: Writable + crate :: RegisterSpec , { # [doc = "NOP"] # [inline (always)] pub fn rstctl_resetassert_nop (self) -> & 'a mut crate :: W < REG > { self . variant (RSTCTL_RESETASSERT_AW :: RSTCTL_RESETASSERT_NOP) } # [doc = "ASSERT"] # [inline (always)] pub fn rstctl_resetassert_assert (self) -> & 'a mut crate :: W < REG > { self . variant (RSTCTL_RESETASSERT_AW :: RSTCTL_RESETASSERT_ASSERT) } } # [doc = "Clear the RESETSTKY bit in the STAT register\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] pub enum RSTCTL_RESETSTKYCLR_AW { # [doc = "0: NOP"] RSTCTL_RESETSTKYCLR_NOP = 0 , # [doc = "1: CLR"] RSTCTL_RESETSTKYCLR_CLR = 1 , } impl From < RSTCTL_RESETSTKYCLR_AW > for bool { # [inline (always)] fn from (variant : RSTCTL_RESETSTKYCLR_AW) -> Self { variant as u8 != 0 } } # [doc = "Field `RSTCTL_RESETSTKYCLR` writer - Clear the RESETSTKY bit in the STAT register"] pub type RSTCTL_RESETSTKYCLR_W < 'a , REG , const O : u8 > = crate :: BitWriter < 'a , REG , O , RSTCTL_RESETSTKYCLR_AW > ; impl < 'a , REG , const O : u8 > RSTCTL_RESETSTKYCLR_W < 'a , REG , O > where REG : crate :: Writable + crate :: RegisterSpec , { # [doc = "NOP"] # [inline (always)] pub fn rstctl_resetstkyclr_nop (self) -> & 'a mut crate :: W < REG > { self . variant (RSTCTL_RESETSTKYCLR_AW :: RSTCTL_RESETSTKYCLR_NOP) } # [doc = "CLR"] # [inline (always)] pub fn rstctl_resetstkyclr_clr (self) -> & 'a mut crate :: W < REG > { self . variant (RSTCTL_RESETSTKYCLR_AW :: RSTCTL_RESETSTKYCLR_CLR) } } # [doc = "Unlock key\n\nValue on reset: 0"] # [derive (Clone , Copy , Debug , PartialEq , Eq)] # [repr (u8)] pub enum RSTCTL_KEY_AW { # [doc = "177: _TO_UNLOCK_W_"] RSTCTL_KEY_UNLOCK_W = 177 , } impl From < RSTCTL_KEY_AW > for u8 { # [inline (always)] fn from (variant : RSTCTL_KEY_AW) -> Self { variant as _ } } impl crate :: FieldSpec for RSTCTL_KEY_AW { type Ux = u8 ; } # [doc = "Field `RSTCTL_KEY` writer - Unlock key"] pub type RSTCTL_KEY_W < 'a , REG , const O : u8 > = crate :: FieldWriter < 'a , REG , 8 , O , RSTCTL_KEY_AW > ; impl < 'a , REG , const O : u8 > RSTCTL_KEY_W < 'a , REG , O > where REG : crate :: Writable + crate :: RegisterSpec , REG :: Ux : From < u8 > { # [doc = "_TO_UNLOCK_W_"] # [inline (always)] pub fn rstctl_key_unlock_w (self) -> & 'a mut crate :: W < REG > { self . variant (RSTCTL_KEY_AW :: RSTCTL_KEY_UNLOCK_W) } } impl W { # [doc = "Bit 0 - Assert reset to the peripheral"] # [inline (always)] # [must_use] pub fn rstctl_resetassert (& mut self) -> RSTCTL_RESETASSERT_W < RSTCTL_SPEC , 0 > { RSTCTL_RESETASSERT_W :: new (self) } # [doc = "Bit 1 - Clear the RESETSTKY bit in the STAT register"] # [inline (always)] # [must_use] pub fn rstctl_resetstkyclr (& mut self) -> RSTCTL_RESETSTKYCLR_W < RSTCTL_SPEC , 1 > { RSTCTL_RESETSTKYCLR_W :: new (self) } # [doc = "Bits 24:31 - Unlock key"] # [inline (always)] # [must_use] pub fn rstctl_key (& mut self) -> RSTCTL_KEY_W < RSTCTL_SPEC , 24 > { RSTCTL_KEY_W :: new (self) } # [doc = r" Writes raw bits to the register."] # [doc = r""] # [doc = r" # Safety"] # [doc = r""] # [doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] # [inline (always)] pub unsafe fn bits (& mut self , bits : u32) -> & mut Self { self . bits = bits ; self } } # [doc = "Reset Control\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstctl::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct RSTCTL_SPEC ; impl crate :: RegisterSpec for RSTCTL_SPEC { type Ux = u32 ; } # [doc = "`write(|w| ..)` method takes [`rstctl::W`](W) writer structure"] impl crate :: Writable for RSTCTL_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP : Self :: Ux = 0 ; const ONE_TO_MODIFY_FIELDS_BITMAP : Self :: Ux = 0 ; } # [doc = "`reset()` method sets RSTCTL to value 0"] impl crate :: Resettable for RSTCTL_SPEC { const RESET_VALUE : Self :: Ux = 0 ; }