msp432p401r/sysctl/
sys_perihalt_ctl.rs

1#[doc = "Register `SYS_PERIHALT_CTL` reader"]
2pub struct R(crate::R<SYS_PERIHALT_CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYS_PERIHALT_CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYS_PERIHALT_CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYS_PERIHALT_CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SYS_PERIHALT_CTL` writer"]
17pub struct W(crate::W<SYS_PERIHALT_CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SYS_PERIHALT_CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SYS_PERIHALT_CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SYS_PERIHALT_CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum HALT_T16_0_A {
40    #[doc = "0: IP operation unaffected when CPU is halted"]
41    HALT_T16_0_0 = 0,
42    #[doc = "1: freezes IP operation when CPU is halted"]
43    HALT_T16_0_1 = 1,
44}
45impl From<HALT_T16_0_A> for bool {
46    #[inline(always)]
47    fn from(variant: HALT_T16_0_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `HALT_T16_0` reader - Freezes IP operation when CPU is halted"]
52pub type HALT_T16_0_R = crate::BitReader<HALT_T16_0_A>;
53impl HALT_T16_0_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> HALT_T16_0_A {
57        match self.bits {
58            false => HALT_T16_0_A::HALT_T16_0_0,
59            true => HALT_T16_0_A::HALT_T16_0_1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `HALT_T16_0_0`"]
63    #[inline(always)]
64    pub fn is_halt_t16_0_0(&self) -> bool {
65        *self == HALT_T16_0_A::HALT_T16_0_0
66    }
67    #[doc = "Checks if the value of the field is `HALT_T16_0_1`"]
68    #[inline(always)]
69    pub fn is_halt_t16_0_1(&self) -> bool {
70        *self == HALT_T16_0_A::HALT_T16_0_1
71    }
72}
73#[doc = "Field `HALT_T16_0` writer - Freezes IP operation when CPU is halted"]
74pub type HALT_T16_0_W<'a, const O: u8> =
75    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_T16_0_A, O>;
76impl<'a, const O: u8> HALT_T16_0_W<'a, O> {
77    #[doc = "IP operation unaffected when CPU is halted"]
78    #[inline(always)]
79    pub fn halt_t16_0_0(self) -> &'a mut W {
80        self.variant(HALT_T16_0_A::HALT_T16_0_0)
81    }
82    #[doc = "freezes IP operation when CPU is halted"]
83    #[inline(always)]
84    pub fn halt_t16_0_1(self) -> &'a mut W {
85        self.variant(HALT_T16_0_A::HALT_T16_0_1)
86    }
87}
88#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
89#[derive(Clone, Copy, Debug, PartialEq)]
90pub enum HALT_T16_1_A {
91    #[doc = "0: IP operation unaffected when CPU is halted"]
92    HALT_T16_1_0 = 0,
93    #[doc = "1: freezes IP operation when CPU is halted"]
94    HALT_T16_1_1 = 1,
95}
96impl From<HALT_T16_1_A> for bool {
97    #[inline(always)]
98    fn from(variant: HALT_T16_1_A) -> Self {
99        variant as u8 != 0
100    }
101}
102#[doc = "Field `HALT_T16_1` reader - Freezes IP operation when CPU is halted"]
103pub type HALT_T16_1_R = crate::BitReader<HALT_T16_1_A>;
104impl HALT_T16_1_R {
105    #[doc = "Get enumerated values variant"]
106    #[inline(always)]
107    pub fn variant(&self) -> HALT_T16_1_A {
108        match self.bits {
109            false => HALT_T16_1_A::HALT_T16_1_0,
110            true => HALT_T16_1_A::HALT_T16_1_1,
111        }
112    }
113    #[doc = "Checks if the value of the field is `HALT_T16_1_0`"]
114    #[inline(always)]
115    pub fn is_halt_t16_1_0(&self) -> bool {
116        *self == HALT_T16_1_A::HALT_T16_1_0
117    }
118    #[doc = "Checks if the value of the field is `HALT_T16_1_1`"]
119    #[inline(always)]
120    pub fn is_halt_t16_1_1(&self) -> bool {
121        *self == HALT_T16_1_A::HALT_T16_1_1
122    }
123}
124#[doc = "Field `HALT_T16_1` writer - Freezes IP operation when CPU is halted"]
125pub type HALT_T16_1_W<'a, const O: u8> =
126    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_T16_1_A, O>;
127impl<'a, const O: u8> HALT_T16_1_W<'a, O> {
128    #[doc = "IP operation unaffected when CPU is halted"]
129    #[inline(always)]
130    pub fn halt_t16_1_0(self) -> &'a mut W {
131        self.variant(HALT_T16_1_A::HALT_T16_1_0)
132    }
133    #[doc = "freezes IP operation when CPU is halted"]
134    #[inline(always)]
135    pub fn halt_t16_1_1(self) -> &'a mut W {
136        self.variant(HALT_T16_1_A::HALT_T16_1_1)
137    }
138}
139#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum HALT_T16_2_A {
142    #[doc = "0: IP operation unaffected when CPU is halted"]
143    HALT_T16_2_0 = 0,
144    #[doc = "1: freezes IP operation when CPU is halted"]
145    HALT_T16_2_1 = 1,
146}
147impl From<HALT_T16_2_A> for bool {
148    #[inline(always)]
149    fn from(variant: HALT_T16_2_A) -> Self {
150        variant as u8 != 0
151    }
152}
153#[doc = "Field `HALT_T16_2` reader - Freezes IP operation when CPU is halted"]
154pub type HALT_T16_2_R = crate::BitReader<HALT_T16_2_A>;
155impl HALT_T16_2_R {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub fn variant(&self) -> HALT_T16_2_A {
159        match self.bits {
160            false => HALT_T16_2_A::HALT_T16_2_0,
161            true => HALT_T16_2_A::HALT_T16_2_1,
162        }
163    }
164    #[doc = "Checks if the value of the field is `HALT_T16_2_0`"]
165    #[inline(always)]
166    pub fn is_halt_t16_2_0(&self) -> bool {
167        *self == HALT_T16_2_A::HALT_T16_2_0
168    }
169    #[doc = "Checks if the value of the field is `HALT_T16_2_1`"]
170    #[inline(always)]
171    pub fn is_halt_t16_2_1(&self) -> bool {
172        *self == HALT_T16_2_A::HALT_T16_2_1
173    }
174}
175#[doc = "Field `HALT_T16_2` writer - Freezes IP operation when CPU is halted"]
176pub type HALT_T16_2_W<'a, const O: u8> =
177    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_T16_2_A, O>;
178impl<'a, const O: u8> HALT_T16_2_W<'a, O> {
179    #[doc = "IP operation unaffected when CPU is halted"]
180    #[inline(always)]
181    pub fn halt_t16_2_0(self) -> &'a mut W {
182        self.variant(HALT_T16_2_A::HALT_T16_2_0)
183    }
184    #[doc = "freezes IP operation when CPU is halted"]
185    #[inline(always)]
186    pub fn halt_t16_2_1(self) -> &'a mut W {
187        self.variant(HALT_T16_2_A::HALT_T16_2_1)
188    }
189}
190#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
191#[derive(Clone, Copy, Debug, PartialEq)]
192pub enum HALT_T16_3_A {
193    #[doc = "0: IP operation unaffected when CPU is halted"]
194    HALT_T16_3_0 = 0,
195    #[doc = "1: freezes IP operation when CPU is halted"]
196    HALT_T16_3_1 = 1,
197}
198impl From<HALT_T16_3_A> for bool {
199    #[inline(always)]
200    fn from(variant: HALT_T16_3_A) -> Self {
201        variant as u8 != 0
202    }
203}
204#[doc = "Field `HALT_T16_3` reader - Freezes IP operation when CPU is halted"]
205pub type HALT_T16_3_R = crate::BitReader<HALT_T16_3_A>;
206impl HALT_T16_3_R {
207    #[doc = "Get enumerated values variant"]
208    #[inline(always)]
209    pub fn variant(&self) -> HALT_T16_3_A {
210        match self.bits {
211            false => HALT_T16_3_A::HALT_T16_3_0,
212            true => HALT_T16_3_A::HALT_T16_3_1,
213        }
214    }
215    #[doc = "Checks if the value of the field is `HALT_T16_3_0`"]
216    #[inline(always)]
217    pub fn is_halt_t16_3_0(&self) -> bool {
218        *self == HALT_T16_3_A::HALT_T16_3_0
219    }
220    #[doc = "Checks if the value of the field is `HALT_T16_3_1`"]
221    #[inline(always)]
222    pub fn is_halt_t16_3_1(&self) -> bool {
223        *self == HALT_T16_3_A::HALT_T16_3_1
224    }
225}
226#[doc = "Field `HALT_T16_3` writer - Freezes IP operation when CPU is halted"]
227pub type HALT_T16_3_W<'a, const O: u8> =
228    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_T16_3_A, O>;
229impl<'a, const O: u8> HALT_T16_3_W<'a, O> {
230    #[doc = "IP operation unaffected when CPU is halted"]
231    #[inline(always)]
232    pub fn halt_t16_3_0(self) -> &'a mut W {
233        self.variant(HALT_T16_3_A::HALT_T16_3_0)
234    }
235    #[doc = "freezes IP operation when CPU is halted"]
236    #[inline(always)]
237    pub fn halt_t16_3_1(self) -> &'a mut W {
238        self.variant(HALT_T16_3_A::HALT_T16_3_1)
239    }
240}
241#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
242#[derive(Clone, Copy, Debug, PartialEq)]
243pub enum HALT_T32_0_A {
244    #[doc = "0: IP operation unaffected when CPU is halted"]
245    HALT_T32_0_0 = 0,
246    #[doc = "1: freezes IP operation when CPU is halted"]
247    HALT_T32_0_1 = 1,
248}
249impl From<HALT_T32_0_A> for bool {
250    #[inline(always)]
251    fn from(variant: HALT_T32_0_A) -> Self {
252        variant as u8 != 0
253    }
254}
255#[doc = "Field `HALT_T32_0` reader - Freezes IP operation when CPU is halted"]
256pub type HALT_T32_0_R = crate::BitReader<HALT_T32_0_A>;
257impl HALT_T32_0_R {
258    #[doc = "Get enumerated values variant"]
259    #[inline(always)]
260    pub fn variant(&self) -> HALT_T32_0_A {
261        match self.bits {
262            false => HALT_T32_0_A::HALT_T32_0_0,
263            true => HALT_T32_0_A::HALT_T32_0_1,
264        }
265    }
266    #[doc = "Checks if the value of the field is `HALT_T32_0_0`"]
267    #[inline(always)]
268    pub fn is_halt_t32_0_0(&self) -> bool {
269        *self == HALT_T32_0_A::HALT_T32_0_0
270    }
271    #[doc = "Checks if the value of the field is `HALT_T32_0_1`"]
272    #[inline(always)]
273    pub fn is_halt_t32_0_1(&self) -> bool {
274        *self == HALT_T32_0_A::HALT_T32_0_1
275    }
276}
277#[doc = "Field `HALT_T32_0` writer - Freezes IP operation when CPU is halted"]
278pub type HALT_T32_0_W<'a, const O: u8> =
279    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_T32_0_A, O>;
280impl<'a, const O: u8> HALT_T32_0_W<'a, O> {
281    #[doc = "IP operation unaffected when CPU is halted"]
282    #[inline(always)]
283    pub fn halt_t32_0_0(self) -> &'a mut W {
284        self.variant(HALT_T32_0_A::HALT_T32_0_0)
285    }
286    #[doc = "freezes IP operation when CPU is halted"]
287    #[inline(always)]
288    pub fn halt_t32_0_1(self) -> &'a mut W {
289        self.variant(HALT_T32_0_A::HALT_T32_0_1)
290    }
291}
292#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
293#[derive(Clone, Copy, Debug, PartialEq)]
294pub enum HALT_EUA0_A {
295    #[doc = "0: IP operation unaffected when CPU is halted"]
296    HALT_EUA0_0 = 0,
297    #[doc = "1: freezes IP operation when CPU is halted"]
298    HALT_EUA0_1 = 1,
299}
300impl From<HALT_EUA0_A> for bool {
301    #[inline(always)]
302    fn from(variant: HALT_EUA0_A) -> Self {
303        variant as u8 != 0
304    }
305}
306#[doc = "Field `HALT_eUA0` reader - Freezes IP operation when CPU is halted"]
307pub type HALT_EUA0_R = crate::BitReader<HALT_EUA0_A>;
308impl HALT_EUA0_R {
309    #[doc = "Get enumerated values variant"]
310    #[inline(always)]
311    pub fn variant(&self) -> HALT_EUA0_A {
312        match self.bits {
313            false => HALT_EUA0_A::HALT_EUA0_0,
314            true => HALT_EUA0_A::HALT_EUA0_1,
315        }
316    }
317    #[doc = "Checks if the value of the field is `HALT_EUA0_0`"]
318    #[inline(always)]
319    pub fn is_halt_e_ua0_0(&self) -> bool {
320        *self == HALT_EUA0_A::HALT_EUA0_0
321    }
322    #[doc = "Checks if the value of the field is `HALT_EUA0_1`"]
323    #[inline(always)]
324    pub fn is_halt_e_ua0_1(&self) -> bool {
325        *self == HALT_EUA0_A::HALT_EUA0_1
326    }
327}
328#[doc = "Field `HALT_eUA0` writer - Freezes IP operation when CPU is halted"]
329pub type HALT_EUA0_W<'a, const O: u8> =
330    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUA0_A, O>;
331impl<'a, const O: u8> HALT_EUA0_W<'a, O> {
332    #[doc = "IP operation unaffected when CPU is halted"]
333    #[inline(always)]
334    pub fn halt_e_ua0_0(self) -> &'a mut W {
335        self.variant(HALT_EUA0_A::HALT_EUA0_0)
336    }
337    #[doc = "freezes IP operation when CPU is halted"]
338    #[inline(always)]
339    pub fn halt_e_ua0_1(self) -> &'a mut W {
340        self.variant(HALT_EUA0_A::HALT_EUA0_1)
341    }
342}
343#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
344#[derive(Clone, Copy, Debug, PartialEq)]
345pub enum HALT_EUA1_A {
346    #[doc = "0: IP operation unaffected when CPU is halted"]
347    HALT_EUA1_0 = 0,
348    #[doc = "1: freezes IP operation when CPU is halted"]
349    HALT_EUA1_1 = 1,
350}
351impl From<HALT_EUA1_A> for bool {
352    #[inline(always)]
353    fn from(variant: HALT_EUA1_A) -> Self {
354        variant as u8 != 0
355    }
356}
357#[doc = "Field `HALT_eUA1` reader - Freezes IP operation when CPU is halted"]
358pub type HALT_EUA1_R = crate::BitReader<HALT_EUA1_A>;
359impl HALT_EUA1_R {
360    #[doc = "Get enumerated values variant"]
361    #[inline(always)]
362    pub fn variant(&self) -> HALT_EUA1_A {
363        match self.bits {
364            false => HALT_EUA1_A::HALT_EUA1_0,
365            true => HALT_EUA1_A::HALT_EUA1_1,
366        }
367    }
368    #[doc = "Checks if the value of the field is `HALT_EUA1_0`"]
369    #[inline(always)]
370    pub fn is_halt_e_ua1_0(&self) -> bool {
371        *self == HALT_EUA1_A::HALT_EUA1_0
372    }
373    #[doc = "Checks if the value of the field is `HALT_EUA1_1`"]
374    #[inline(always)]
375    pub fn is_halt_e_ua1_1(&self) -> bool {
376        *self == HALT_EUA1_A::HALT_EUA1_1
377    }
378}
379#[doc = "Field `HALT_eUA1` writer - Freezes IP operation when CPU is halted"]
380pub type HALT_EUA1_W<'a, const O: u8> =
381    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUA1_A, O>;
382impl<'a, const O: u8> HALT_EUA1_W<'a, O> {
383    #[doc = "IP operation unaffected when CPU is halted"]
384    #[inline(always)]
385    pub fn halt_e_ua1_0(self) -> &'a mut W {
386        self.variant(HALT_EUA1_A::HALT_EUA1_0)
387    }
388    #[doc = "freezes IP operation when CPU is halted"]
389    #[inline(always)]
390    pub fn halt_e_ua1_1(self) -> &'a mut W {
391        self.variant(HALT_EUA1_A::HALT_EUA1_1)
392    }
393}
394#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
395#[derive(Clone, Copy, Debug, PartialEq)]
396pub enum HALT_EUA2_A {
397    #[doc = "0: IP operation unaffected when CPU is halted"]
398    HALT_EUA2_0 = 0,
399    #[doc = "1: freezes IP operation when CPU is halted"]
400    HALT_EUA2_1 = 1,
401}
402impl From<HALT_EUA2_A> for bool {
403    #[inline(always)]
404    fn from(variant: HALT_EUA2_A) -> Self {
405        variant as u8 != 0
406    }
407}
408#[doc = "Field `HALT_eUA2` reader - Freezes IP operation when CPU is halted"]
409pub type HALT_EUA2_R = crate::BitReader<HALT_EUA2_A>;
410impl HALT_EUA2_R {
411    #[doc = "Get enumerated values variant"]
412    #[inline(always)]
413    pub fn variant(&self) -> HALT_EUA2_A {
414        match self.bits {
415            false => HALT_EUA2_A::HALT_EUA2_0,
416            true => HALT_EUA2_A::HALT_EUA2_1,
417        }
418    }
419    #[doc = "Checks if the value of the field is `HALT_EUA2_0`"]
420    #[inline(always)]
421    pub fn is_halt_e_ua2_0(&self) -> bool {
422        *self == HALT_EUA2_A::HALT_EUA2_0
423    }
424    #[doc = "Checks if the value of the field is `HALT_EUA2_1`"]
425    #[inline(always)]
426    pub fn is_halt_e_ua2_1(&self) -> bool {
427        *self == HALT_EUA2_A::HALT_EUA2_1
428    }
429}
430#[doc = "Field `HALT_eUA2` writer - Freezes IP operation when CPU is halted"]
431pub type HALT_EUA2_W<'a, const O: u8> =
432    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUA2_A, O>;
433impl<'a, const O: u8> HALT_EUA2_W<'a, O> {
434    #[doc = "IP operation unaffected when CPU is halted"]
435    #[inline(always)]
436    pub fn halt_e_ua2_0(self) -> &'a mut W {
437        self.variant(HALT_EUA2_A::HALT_EUA2_0)
438    }
439    #[doc = "freezes IP operation when CPU is halted"]
440    #[inline(always)]
441    pub fn halt_e_ua2_1(self) -> &'a mut W {
442        self.variant(HALT_EUA2_A::HALT_EUA2_1)
443    }
444}
445#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
446#[derive(Clone, Copy, Debug, PartialEq)]
447pub enum HALT_EUA3_A {
448    #[doc = "0: IP operation unaffected when CPU is halted"]
449    HALT_EUA3_0 = 0,
450    #[doc = "1: freezes IP operation when CPU is halted"]
451    HALT_EUA3_1 = 1,
452}
453impl From<HALT_EUA3_A> for bool {
454    #[inline(always)]
455    fn from(variant: HALT_EUA3_A) -> Self {
456        variant as u8 != 0
457    }
458}
459#[doc = "Field `HALT_eUA3` reader - Freezes IP operation when CPU is halted"]
460pub type HALT_EUA3_R = crate::BitReader<HALT_EUA3_A>;
461impl HALT_EUA3_R {
462    #[doc = "Get enumerated values variant"]
463    #[inline(always)]
464    pub fn variant(&self) -> HALT_EUA3_A {
465        match self.bits {
466            false => HALT_EUA3_A::HALT_EUA3_0,
467            true => HALT_EUA3_A::HALT_EUA3_1,
468        }
469    }
470    #[doc = "Checks if the value of the field is `HALT_EUA3_0`"]
471    #[inline(always)]
472    pub fn is_halt_e_ua3_0(&self) -> bool {
473        *self == HALT_EUA3_A::HALT_EUA3_0
474    }
475    #[doc = "Checks if the value of the field is `HALT_EUA3_1`"]
476    #[inline(always)]
477    pub fn is_halt_e_ua3_1(&self) -> bool {
478        *self == HALT_EUA3_A::HALT_EUA3_1
479    }
480}
481#[doc = "Field `HALT_eUA3` writer - Freezes IP operation when CPU is halted"]
482pub type HALT_EUA3_W<'a, const O: u8> =
483    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUA3_A, O>;
484impl<'a, const O: u8> HALT_EUA3_W<'a, O> {
485    #[doc = "IP operation unaffected when CPU is halted"]
486    #[inline(always)]
487    pub fn halt_e_ua3_0(self) -> &'a mut W {
488        self.variant(HALT_EUA3_A::HALT_EUA3_0)
489    }
490    #[doc = "freezes IP operation when CPU is halted"]
491    #[inline(always)]
492    pub fn halt_e_ua3_1(self) -> &'a mut W {
493        self.variant(HALT_EUA3_A::HALT_EUA3_1)
494    }
495}
496#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
497#[derive(Clone, Copy, Debug, PartialEq)]
498pub enum HALT_EUB0_A {
499    #[doc = "0: IP operation unaffected when CPU is halted"]
500    HALT_EUB0_0 = 0,
501    #[doc = "1: freezes IP operation when CPU is halted"]
502    HALT_EUB0_1 = 1,
503}
504impl From<HALT_EUB0_A> for bool {
505    #[inline(always)]
506    fn from(variant: HALT_EUB0_A) -> Self {
507        variant as u8 != 0
508    }
509}
510#[doc = "Field `HALT_eUB0` reader - Freezes IP operation when CPU is halted"]
511pub type HALT_EUB0_R = crate::BitReader<HALT_EUB0_A>;
512impl HALT_EUB0_R {
513    #[doc = "Get enumerated values variant"]
514    #[inline(always)]
515    pub fn variant(&self) -> HALT_EUB0_A {
516        match self.bits {
517            false => HALT_EUB0_A::HALT_EUB0_0,
518            true => HALT_EUB0_A::HALT_EUB0_1,
519        }
520    }
521    #[doc = "Checks if the value of the field is `HALT_EUB0_0`"]
522    #[inline(always)]
523    pub fn is_halt_e_ub0_0(&self) -> bool {
524        *self == HALT_EUB0_A::HALT_EUB0_0
525    }
526    #[doc = "Checks if the value of the field is `HALT_EUB0_1`"]
527    #[inline(always)]
528    pub fn is_halt_e_ub0_1(&self) -> bool {
529        *self == HALT_EUB0_A::HALT_EUB0_1
530    }
531}
532#[doc = "Field `HALT_eUB0` writer - Freezes IP operation when CPU is halted"]
533pub type HALT_EUB0_W<'a, const O: u8> =
534    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUB0_A, O>;
535impl<'a, const O: u8> HALT_EUB0_W<'a, O> {
536    #[doc = "IP operation unaffected when CPU is halted"]
537    #[inline(always)]
538    pub fn halt_e_ub0_0(self) -> &'a mut W {
539        self.variant(HALT_EUB0_A::HALT_EUB0_0)
540    }
541    #[doc = "freezes IP operation when CPU is halted"]
542    #[inline(always)]
543    pub fn halt_e_ub0_1(self) -> &'a mut W {
544        self.variant(HALT_EUB0_A::HALT_EUB0_1)
545    }
546}
547#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
548#[derive(Clone, Copy, Debug, PartialEq)]
549pub enum HALT_EUB1_A {
550    #[doc = "0: IP operation unaffected when CPU is halted"]
551    HALT_EUB1_0 = 0,
552    #[doc = "1: freezes IP operation when CPU is halted"]
553    HALT_EUB1_1 = 1,
554}
555impl From<HALT_EUB1_A> for bool {
556    #[inline(always)]
557    fn from(variant: HALT_EUB1_A) -> Self {
558        variant as u8 != 0
559    }
560}
561#[doc = "Field `HALT_eUB1` reader - Freezes IP operation when CPU is halted"]
562pub type HALT_EUB1_R = crate::BitReader<HALT_EUB1_A>;
563impl HALT_EUB1_R {
564    #[doc = "Get enumerated values variant"]
565    #[inline(always)]
566    pub fn variant(&self) -> HALT_EUB1_A {
567        match self.bits {
568            false => HALT_EUB1_A::HALT_EUB1_0,
569            true => HALT_EUB1_A::HALT_EUB1_1,
570        }
571    }
572    #[doc = "Checks if the value of the field is `HALT_EUB1_0`"]
573    #[inline(always)]
574    pub fn is_halt_e_ub1_0(&self) -> bool {
575        *self == HALT_EUB1_A::HALT_EUB1_0
576    }
577    #[doc = "Checks if the value of the field is `HALT_EUB1_1`"]
578    #[inline(always)]
579    pub fn is_halt_e_ub1_1(&self) -> bool {
580        *self == HALT_EUB1_A::HALT_EUB1_1
581    }
582}
583#[doc = "Field `HALT_eUB1` writer - Freezes IP operation when CPU is halted"]
584pub type HALT_EUB1_W<'a, const O: u8> =
585    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUB1_A, O>;
586impl<'a, const O: u8> HALT_EUB1_W<'a, O> {
587    #[doc = "IP operation unaffected when CPU is halted"]
588    #[inline(always)]
589    pub fn halt_e_ub1_0(self) -> &'a mut W {
590        self.variant(HALT_EUB1_A::HALT_EUB1_0)
591    }
592    #[doc = "freezes IP operation when CPU is halted"]
593    #[inline(always)]
594    pub fn halt_e_ub1_1(self) -> &'a mut W {
595        self.variant(HALT_EUB1_A::HALT_EUB1_1)
596    }
597}
598#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
599#[derive(Clone, Copy, Debug, PartialEq)]
600pub enum HALT_EUB2_A {
601    #[doc = "0: IP operation unaffected when CPU is halted"]
602    HALT_EUB2_0 = 0,
603    #[doc = "1: freezes IP operation when CPU is halted"]
604    HALT_EUB2_1 = 1,
605}
606impl From<HALT_EUB2_A> for bool {
607    #[inline(always)]
608    fn from(variant: HALT_EUB2_A) -> Self {
609        variant as u8 != 0
610    }
611}
612#[doc = "Field `HALT_eUB2` reader - Freezes IP operation when CPU is halted"]
613pub type HALT_EUB2_R = crate::BitReader<HALT_EUB2_A>;
614impl HALT_EUB2_R {
615    #[doc = "Get enumerated values variant"]
616    #[inline(always)]
617    pub fn variant(&self) -> HALT_EUB2_A {
618        match self.bits {
619            false => HALT_EUB2_A::HALT_EUB2_0,
620            true => HALT_EUB2_A::HALT_EUB2_1,
621        }
622    }
623    #[doc = "Checks if the value of the field is `HALT_EUB2_0`"]
624    #[inline(always)]
625    pub fn is_halt_e_ub2_0(&self) -> bool {
626        *self == HALT_EUB2_A::HALT_EUB2_0
627    }
628    #[doc = "Checks if the value of the field is `HALT_EUB2_1`"]
629    #[inline(always)]
630    pub fn is_halt_e_ub2_1(&self) -> bool {
631        *self == HALT_EUB2_A::HALT_EUB2_1
632    }
633}
634#[doc = "Field `HALT_eUB2` writer - Freezes IP operation when CPU is halted"]
635pub type HALT_EUB2_W<'a, const O: u8> =
636    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUB2_A, O>;
637impl<'a, const O: u8> HALT_EUB2_W<'a, O> {
638    #[doc = "IP operation unaffected when CPU is halted"]
639    #[inline(always)]
640    pub fn halt_e_ub2_0(self) -> &'a mut W {
641        self.variant(HALT_EUB2_A::HALT_EUB2_0)
642    }
643    #[doc = "freezes IP operation when CPU is halted"]
644    #[inline(always)]
645    pub fn halt_e_ub2_1(self) -> &'a mut W {
646        self.variant(HALT_EUB2_A::HALT_EUB2_1)
647    }
648}
649#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
650#[derive(Clone, Copy, Debug, PartialEq)]
651pub enum HALT_EUB3_A {
652    #[doc = "0: IP operation unaffected when CPU is halted"]
653    HALT_EUB3_0 = 0,
654    #[doc = "1: freezes IP operation when CPU is halted"]
655    HALT_EUB3_1 = 1,
656}
657impl From<HALT_EUB3_A> for bool {
658    #[inline(always)]
659    fn from(variant: HALT_EUB3_A) -> Self {
660        variant as u8 != 0
661    }
662}
663#[doc = "Field `HALT_eUB3` reader - Freezes IP operation when CPU is halted"]
664pub type HALT_EUB3_R = crate::BitReader<HALT_EUB3_A>;
665impl HALT_EUB3_R {
666    #[doc = "Get enumerated values variant"]
667    #[inline(always)]
668    pub fn variant(&self) -> HALT_EUB3_A {
669        match self.bits {
670            false => HALT_EUB3_A::HALT_EUB3_0,
671            true => HALT_EUB3_A::HALT_EUB3_1,
672        }
673    }
674    #[doc = "Checks if the value of the field is `HALT_EUB3_0`"]
675    #[inline(always)]
676    pub fn is_halt_e_ub3_0(&self) -> bool {
677        *self == HALT_EUB3_A::HALT_EUB3_0
678    }
679    #[doc = "Checks if the value of the field is `HALT_EUB3_1`"]
680    #[inline(always)]
681    pub fn is_halt_e_ub3_1(&self) -> bool {
682        *self == HALT_EUB3_A::HALT_EUB3_1
683    }
684}
685#[doc = "Field `HALT_eUB3` writer - Freezes IP operation when CPU is halted"]
686pub type HALT_EUB3_W<'a, const O: u8> =
687    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_EUB3_A, O>;
688impl<'a, const O: u8> HALT_EUB3_W<'a, O> {
689    #[doc = "IP operation unaffected when CPU is halted"]
690    #[inline(always)]
691    pub fn halt_e_ub3_0(self) -> &'a mut W {
692        self.variant(HALT_EUB3_A::HALT_EUB3_0)
693    }
694    #[doc = "freezes IP operation when CPU is halted"]
695    #[inline(always)]
696    pub fn halt_e_ub3_1(self) -> &'a mut W {
697        self.variant(HALT_EUB3_A::HALT_EUB3_1)
698    }
699}
700#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
701#[derive(Clone, Copy, Debug, PartialEq)]
702pub enum HALT_ADC_A {
703    #[doc = "0: IP operation unaffected when CPU is halted"]
704    HALT_ADC_0 = 0,
705    #[doc = "1: freezes IP operation when CPU is halted"]
706    HALT_ADC_1 = 1,
707}
708impl From<HALT_ADC_A> for bool {
709    #[inline(always)]
710    fn from(variant: HALT_ADC_A) -> Self {
711        variant as u8 != 0
712    }
713}
714#[doc = "Field `HALT_ADC` reader - Freezes IP operation when CPU is halted"]
715pub type HALT_ADC_R = crate::BitReader<HALT_ADC_A>;
716impl HALT_ADC_R {
717    #[doc = "Get enumerated values variant"]
718    #[inline(always)]
719    pub fn variant(&self) -> HALT_ADC_A {
720        match self.bits {
721            false => HALT_ADC_A::HALT_ADC_0,
722            true => HALT_ADC_A::HALT_ADC_1,
723        }
724    }
725    #[doc = "Checks if the value of the field is `HALT_ADC_0`"]
726    #[inline(always)]
727    pub fn is_halt_adc_0(&self) -> bool {
728        *self == HALT_ADC_A::HALT_ADC_0
729    }
730    #[doc = "Checks if the value of the field is `HALT_ADC_1`"]
731    #[inline(always)]
732    pub fn is_halt_adc_1(&self) -> bool {
733        *self == HALT_ADC_A::HALT_ADC_1
734    }
735}
736#[doc = "Field `HALT_ADC` writer - Freezes IP operation when CPU is halted"]
737pub type HALT_ADC_W<'a, const O: u8> =
738    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_ADC_A, O>;
739impl<'a, const O: u8> HALT_ADC_W<'a, O> {
740    #[doc = "IP operation unaffected when CPU is halted"]
741    #[inline(always)]
742    pub fn halt_adc_0(self) -> &'a mut W {
743        self.variant(HALT_ADC_A::HALT_ADC_0)
744    }
745    #[doc = "freezes IP operation when CPU is halted"]
746    #[inline(always)]
747    pub fn halt_adc_1(self) -> &'a mut W {
748        self.variant(HALT_ADC_A::HALT_ADC_1)
749    }
750}
751#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 1"]
752#[derive(Clone, Copy, Debug, PartialEq)]
753pub enum HALT_WDT_A {
754    #[doc = "0: IP operation unaffected when CPU is halted"]
755    HALT_WDT_0 = 0,
756    #[doc = "1: freezes IP operation when CPU is halted"]
757    HALT_WDT_1 = 1,
758}
759impl From<HALT_WDT_A> for bool {
760    #[inline(always)]
761    fn from(variant: HALT_WDT_A) -> Self {
762        variant as u8 != 0
763    }
764}
765#[doc = "Field `HALT_WDT` reader - Freezes IP operation when CPU is halted"]
766pub type HALT_WDT_R = crate::BitReader<HALT_WDT_A>;
767impl HALT_WDT_R {
768    #[doc = "Get enumerated values variant"]
769    #[inline(always)]
770    pub fn variant(&self) -> HALT_WDT_A {
771        match self.bits {
772            false => HALT_WDT_A::HALT_WDT_0,
773            true => HALT_WDT_A::HALT_WDT_1,
774        }
775    }
776    #[doc = "Checks if the value of the field is `HALT_WDT_0`"]
777    #[inline(always)]
778    pub fn is_halt_wdt_0(&self) -> bool {
779        *self == HALT_WDT_A::HALT_WDT_0
780    }
781    #[doc = "Checks if the value of the field is `HALT_WDT_1`"]
782    #[inline(always)]
783    pub fn is_halt_wdt_1(&self) -> bool {
784        *self == HALT_WDT_A::HALT_WDT_1
785    }
786}
787#[doc = "Field `HALT_WDT` writer - Freezes IP operation when CPU is halted"]
788pub type HALT_WDT_W<'a, const O: u8> =
789    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_WDT_A, O>;
790impl<'a, const O: u8> HALT_WDT_W<'a, O> {
791    #[doc = "IP operation unaffected when CPU is halted"]
792    #[inline(always)]
793    pub fn halt_wdt_0(self) -> &'a mut W {
794        self.variant(HALT_WDT_A::HALT_WDT_0)
795    }
796    #[doc = "freezes IP operation when CPU is halted"]
797    #[inline(always)]
798    pub fn halt_wdt_1(self) -> &'a mut W {
799        self.variant(HALT_WDT_A::HALT_WDT_1)
800    }
801}
802#[doc = "Freezes IP operation when CPU is halted\n\nValue on reset: 0"]
803#[derive(Clone, Copy, Debug, PartialEq)]
804pub enum HALT_DMA_A {
805    #[doc = "0: IP operation unaffected when CPU is halted"]
806    HALT_DMA_0 = 0,
807    #[doc = "1: freezes IP operation when CPU is halted"]
808    HALT_DMA_1 = 1,
809}
810impl From<HALT_DMA_A> for bool {
811    #[inline(always)]
812    fn from(variant: HALT_DMA_A) -> Self {
813        variant as u8 != 0
814    }
815}
816#[doc = "Field `HALT_DMA` reader - Freezes IP operation when CPU is halted"]
817pub type HALT_DMA_R = crate::BitReader<HALT_DMA_A>;
818impl HALT_DMA_R {
819    #[doc = "Get enumerated values variant"]
820    #[inline(always)]
821    pub fn variant(&self) -> HALT_DMA_A {
822        match self.bits {
823            false => HALT_DMA_A::HALT_DMA_0,
824            true => HALT_DMA_A::HALT_DMA_1,
825        }
826    }
827    #[doc = "Checks if the value of the field is `HALT_DMA_0`"]
828    #[inline(always)]
829    pub fn is_halt_dma_0(&self) -> bool {
830        *self == HALT_DMA_A::HALT_DMA_0
831    }
832    #[doc = "Checks if the value of the field is `HALT_DMA_1`"]
833    #[inline(always)]
834    pub fn is_halt_dma_1(&self) -> bool {
835        *self == HALT_DMA_A::HALT_DMA_1
836    }
837}
838#[doc = "Field `HALT_DMA` writer - Freezes IP operation when CPU is halted"]
839pub type HALT_DMA_W<'a, const O: u8> =
840    crate::BitWriter<'a, u32, SYS_PERIHALT_CTL_SPEC, HALT_DMA_A, O>;
841impl<'a, const O: u8> HALT_DMA_W<'a, O> {
842    #[doc = "IP operation unaffected when CPU is halted"]
843    #[inline(always)]
844    pub fn halt_dma_0(self) -> &'a mut W {
845        self.variant(HALT_DMA_A::HALT_DMA_0)
846    }
847    #[doc = "freezes IP operation when CPU is halted"]
848    #[inline(always)]
849    pub fn halt_dma_1(self) -> &'a mut W {
850        self.variant(HALT_DMA_A::HALT_DMA_1)
851    }
852}
853impl R {
854    #[doc = "Bit 0 - Freezes IP operation when CPU is halted"]
855    #[inline(always)]
856    pub fn halt_t16_0(&self) -> HALT_T16_0_R {
857        HALT_T16_0_R::new((self.bits & 1) != 0)
858    }
859    #[doc = "Bit 1 - Freezes IP operation when CPU is halted"]
860    #[inline(always)]
861    pub fn halt_t16_1(&self) -> HALT_T16_1_R {
862        HALT_T16_1_R::new(((self.bits >> 1) & 1) != 0)
863    }
864    #[doc = "Bit 2 - Freezes IP operation when CPU is halted"]
865    #[inline(always)]
866    pub fn halt_t16_2(&self) -> HALT_T16_2_R {
867        HALT_T16_2_R::new(((self.bits >> 2) & 1) != 0)
868    }
869    #[doc = "Bit 3 - Freezes IP operation when CPU is halted"]
870    #[inline(always)]
871    pub fn halt_t16_3(&self) -> HALT_T16_3_R {
872        HALT_T16_3_R::new(((self.bits >> 3) & 1) != 0)
873    }
874    #[doc = "Bit 4 - Freezes IP operation when CPU is halted"]
875    #[inline(always)]
876    pub fn halt_t32_0(&self) -> HALT_T32_0_R {
877        HALT_T32_0_R::new(((self.bits >> 4) & 1) != 0)
878    }
879    #[doc = "Bit 5 - Freezes IP operation when CPU is halted"]
880    #[inline(always)]
881    pub fn halt_e_ua0(&self) -> HALT_EUA0_R {
882        HALT_EUA0_R::new(((self.bits >> 5) & 1) != 0)
883    }
884    #[doc = "Bit 6 - Freezes IP operation when CPU is halted"]
885    #[inline(always)]
886    pub fn halt_e_ua1(&self) -> HALT_EUA1_R {
887        HALT_EUA1_R::new(((self.bits >> 6) & 1) != 0)
888    }
889    #[doc = "Bit 7 - Freezes IP operation when CPU is halted"]
890    #[inline(always)]
891    pub fn halt_e_ua2(&self) -> HALT_EUA2_R {
892        HALT_EUA2_R::new(((self.bits >> 7) & 1) != 0)
893    }
894    #[doc = "Bit 8 - Freezes IP operation when CPU is halted"]
895    #[inline(always)]
896    pub fn halt_e_ua3(&self) -> HALT_EUA3_R {
897        HALT_EUA3_R::new(((self.bits >> 8) & 1) != 0)
898    }
899    #[doc = "Bit 9 - Freezes IP operation when CPU is halted"]
900    #[inline(always)]
901    pub fn halt_e_ub0(&self) -> HALT_EUB0_R {
902        HALT_EUB0_R::new(((self.bits >> 9) & 1) != 0)
903    }
904    #[doc = "Bit 10 - Freezes IP operation when CPU is halted"]
905    #[inline(always)]
906    pub fn halt_e_ub1(&self) -> HALT_EUB1_R {
907        HALT_EUB1_R::new(((self.bits >> 10) & 1) != 0)
908    }
909    #[doc = "Bit 11 - Freezes IP operation when CPU is halted"]
910    #[inline(always)]
911    pub fn halt_e_ub2(&self) -> HALT_EUB2_R {
912        HALT_EUB2_R::new(((self.bits >> 11) & 1) != 0)
913    }
914    #[doc = "Bit 12 - Freezes IP operation when CPU is halted"]
915    #[inline(always)]
916    pub fn halt_e_ub3(&self) -> HALT_EUB3_R {
917        HALT_EUB3_R::new(((self.bits >> 12) & 1) != 0)
918    }
919    #[doc = "Bit 13 - Freezes IP operation when CPU is halted"]
920    #[inline(always)]
921    pub fn halt_adc(&self) -> HALT_ADC_R {
922        HALT_ADC_R::new(((self.bits >> 13) & 1) != 0)
923    }
924    #[doc = "Bit 14 - Freezes IP operation when CPU is halted"]
925    #[inline(always)]
926    pub fn halt_wdt(&self) -> HALT_WDT_R {
927        HALT_WDT_R::new(((self.bits >> 14) & 1) != 0)
928    }
929    #[doc = "Bit 15 - Freezes IP operation when CPU is halted"]
930    #[inline(always)]
931    pub fn halt_dma(&self) -> HALT_DMA_R {
932        HALT_DMA_R::new(((self.bits >> 15) & 1) != 0)
933    }
934}
935impl W {
936    #[doc = "Bit 0 - Freezes IP operation when CPU is halted"]
937    #[inline(always)]
938    pub fn halt_t16_0(&mut self) -> HALT_T16_0_W<0> {
939        HALT_T16_0_W::new(self)
940    }
941    #[doc = "Bit 1 - Freezes IP operation when CPU is halted"]
942    #[inline(always)]
943    pub fn halt_t16_1(&mut self) -> HALT_T16_1_W<1> {
944        HALT_T16_1_W::new(self)
945    }
946    #[doc = "Bit 2 - Freezes IP operation when CPU is halted"]
947    #[inline(always)]
948    pub fn halt_t16_2(&mut self) -> HALT_T16_2_W<2> {
949        HALT_T16_2_W::new(self)
950    }
951    #[doc = "Bit 3 - Freezes IP operation when CPU is halted"]
952    #[inline(always)]
953    pub fn halt_t16_3(&mut self) -> HALT_T16_3_W<3> {
954        HALT_T16_3_W::new(self)
955    }
956    #[doc = "Bit 4 - Freezes IP operation when CPU is halted"]
957    #[inline(always)]
958    pub fn halt_t32_0(&mut self) -> HALT_T32_0_W<4> {
959        HALT_T32_0_W::new(self)
960    }
961    #[doc = "Bit 5 - Freezes IP operation when CPU is halted"]
962    #[inline(always)]
963    pub fn halt_e_ua0(&mut self) -> HALT_EUA0_W<5> {
964        HALT_EUA0_W::new(self)
965    }
966    #[doc = "Bit 6 - Freezes IP operation when CPU is halted"]
967    #[inline(always)]
968    pub fn halt_e_ua1(&mut self) -> HALT_EUA1_W<6> {
969        HALT_EUA1_W::new(self)
970    }
971    #[doc = "Bit 7 - Freezes IP operation when CPU is halted"]
972    #[inline(always)]
973    pub fn halt_e_ua2(&mut self) -> HALT_EUA2_W<7> {
974        HALT_EUA2_W::new(self)
975    }
976    #[doc = "Bit 8 - Freezes IP operation when CPU is halted"]
977    #[inline(always)]
978    pub fn halt_e_ua3(&mut self) -> HALT_EUA3_W<8> {
979        HALT_EUA3_W::new(self)
980    }
981    #[doc = "Bit 9 - Freezes IP operation when CPU is halted"]
982    #[inline(always)]
983    pub fn halt_e_ub0(&mut self) -> HALT_EUB0_W<9> {
984        HALT_EUB0_W::new(self)
985    }
986    #[doc = "Bit 10 - Freezes IP operation when CPU is halted"]
987    #[inline(always)]
988    pub fn halt_e_ub1(&mut self) -> HALT_EUB1_W<10> {
989        HALT_EUB1_W::new(self)
990    }
991    #[doc = "Bit 11 - Freezes IP operation when CPU is halted"]
992    #[inline(always)]
993    pub fn halt_e_ub2(&mut self) -> HALT_EUB2_W<11> {
994        HALT_EUB2_W::new(self)
995    }
996    #[doc = "Bit 12 - Freezes IP operation when CPU is halted"]
997    #[inline(always)]
998    pub fn halt_e_ub3(&mut self) -> HALT_EUB3_W<12> {
999        HALT_EUB3_W::new(self)
1000    }
1001    #[doc = "Bit 13 - Freezes IP operation when CPU is halted"]
1002    #[inline(always)]
1003    pub fn halt_adc(&mut self) -> HALT_ADC_W<13> {
1004        HALT_ADC_W::new(self)
1005    }
1006    #[doc = "Bit 14 - Freezes IP operation when CPU is halted"]
1007    #[inline(always)]
1008    pub fn halt_wdt(&mut self) -> HALT_WDT_W<14> {
1009        HALT_WDT_W::new(self)
1010    }
1011    #[doc = "Bit 15 - Freezes IP operation when CPU is halted"]
1012    #[inline(always)]
1013    pub fn halt_dma(&mut self) -> HALT_DMA_W<15> {
1014        HALT_DMA_W::new(self)
1015    }
1016    #[doc = "Writes raw bits to the register."]
1017    #[inline(always)]
1018    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1019        self.0.bits(bits);
1020        self
1021    }
1022}
1023#[doc = "Peripheral Halt Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sys_perihalt_ctl](index.html) module"]
1024pub struct SYS_PERIHALT_CTL_SPEC;
1025impl crate::RegisterSpec for SYS_PERIHALT_CTL_SPEC {
1026    type Ux = u32;
1027}
1028#[doc = "`read()` method returns [sys_perihalt_ctl::R](R) reader structure"]
1029impl crate::Readable for SYS_PERIHALT_CTL_SPEC {
1030    type Reader = R;
1031}
1032#[doc = "`write(|w| ..)` method takes [sys_perihalt_ctl::W](W) writer structure"]
1033impl crate::Writable for SYS_PERIHALT_CTL_SPEC {
1034    type Writer = W;
1035}
1036#[doc = "`reset()` method sets SYS_PERIHALT_CTL to value 0x4000"]
1037impl crate::Resettable for SYS_PERIHALT_CTL_SPEC {
1038    #[inline(always)]
1039    fn reset_value() -> Self::Ux {
1040        0x4000
1041    }
1042}
msp432p401r/sysctl/sys_perihalt_ctl.rs

msp432p401r/sysctl/
sys_perihalt_ctl.rs
