Enum msp432p401r::dma::dma_enaset::SET_AW
source · [−]#[repr(u32)]
pub enum SET_AW {
SET_0_WRITE,
SET_1_WRITE,
}
Expand description
Returns the enable status of the channels, or enables the corresponding channels.
Value on reset: 0
Variants
SET_0_WRITE
0: No effect. Use the DMA_ENACLR Register to disable a channel.
SET_1_WRITE
1: Enables channel C. Writing to a bit where a DMA channel is not implemented has no effect.
Trait Implementations
impl Copy for SET_AW
impl StructuralPartialEq for SET_AW
Auto Trait Implementations
impl RefUnwindSafe for SET_AW
impl Send for SET_AW
impl Sync for SET_AW
impl Unpin for SET_AW
impl UnwindSafe for SET_AW
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more