[−][src]Type Definition msp432p401r::dma::DMA_INT0_SRCFLG
type DMA_INT0_SRCFLG = Reg<u32, _DMA_INT0_SRCFLG>;
Interrupt 0 Source Channel Flag Register
This register you can read
. See API.
For information about available fields see dma_int0_srcflg module
Trait Implementations
impl Readable for DMA_INT0_SRCFLG
[src]
read()
method returns dma_int0_srcflg::R reader structure