[−][src]Type Definition msp432p401r::dma::DMA_ALTCLR
type DMA_ALTCLR = Reg<u32, _DMA_ALTCLR>;
Channel Primary-Alternate Clear Register
This register you can reset
, write
, write_with_zero
. See API.
For information about available fields see dma_altclr module
Trait Implementations
impl ResetValue for DMA_ALTCLR
[src]
Register DMA_ALTCLR reset()
's with value 0
impl Writable for DMA_ALTCLR
[src]
write(|w| ..)
method takes dma_altclr::W writer structure