Struct msp432e4::i2c0::mimr::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn i2c_mimr_im(&mut self) -> _I2C_MIMR_IMW

Bit 0 - Master Interrupt Mask

pub fn i2c_mimr_clkim(&mut self) -> _I2C_MIMR_CLKIMW

Bit 1 - Clock Timeout Interrupt Mask

pub fn i2c_mimr_dmarxim(&mut self) -> _I2C_MIMR_DMARXIMW

Bit 2 - Receive DMA Interrupt Mask

pub fn i2c_mimr_dmatxim(&mut self) -> _I2C_MIMR_DMATXIMW

Bit 3 - Transmit DMA Interrupt Mask

pub fn i2c_mimr_nackim(&mut self) -> _I2C_MIMR_NACKIMW

Bit 4 - Address/Data NACK Interrupt Mask

pub fn i2c_mimr_startim(&mut self) -> _I2C_MIMR_STARTIMW

Bit 5 - START Detection Interrupt Mask

pub fn i2c_mimr_stopim(&mut self) -> _I2C_MIMR_STOPIMW

Bit 6 - STOP Detection Interrupt Mask

pub fn i2c_mimr_arblostim(&mut self) -> _I2C_MIMR_ARBLOSTIMW

Bit 7 - Arbitration Lost Interrupt Mask

pub fn i2c_mimr_txim(&mut self) -> _I2C_MIMR_TXIMW

Bit 8 - Transmit FIFO Request Interrupt Mask

pub fn i2c_mimr_rxim(&mut self) -> _I2C_MIMR_RXIMW

Bit 9 - Receive FIFO Request Interrupt Mask

pub fn i2c_mimr_txfeim(&mut self) -> _I2C_MIMR_TXFEIMW

Bit 10 - Transmit FIFO Empty Interrupt Mask

pub fn i2c_mimr_rxffim(&mut self) -> _I2C_MIMR_RXFFIMW

Bit 11 - Receive FIFO Full Interrupt Mask