[−][src]Struct msp432e4::can0::RegisterBlock
Register block
Fields
ctl: CTL
0x00 - CAN Control
sts: STS
0x04 - CAN Status
err: ERR
0x08 - CAN Error Counter
bit_: BIT
0x0c - CAN Bit Timing
int: INT
0x10 - CAN Interrupt
tst: TST
0x14 - CAN Test
brpe: BRPE
0x18 - CAN Baud Rate Prescaler Extension
if1crq: IF1CRQ
0x20 - CAN IF1 Command Request
if1cmsk: IF1CMSK
0x24 - CAN IF1 Command Mask
if1msk1: IF1MSK1
0x28 - CAN IF1 Mask 1
if1msk2: IF1MSK2
0x2c - CAN IF1 Mask 2
if1arb1: IF1ARB1
0x30 - CAN IF1 Arbitration 1
if1arb2: IF1ARB2
0x34 - CAN IF1 Arbitration 2
if1mctl: IF1MCTL
0x38 - CAN IF1 Message Control
if1da1: IF1DA1
0x3c - CAN IF1 Data A1
if1da2: IF1DA2
0x40 - CAN IF1 Data A2
if1db1: IF1DB1
0x44 - CAN IF1 Data B1
if1db2: IF1DB2
0x48 - CAN IF1 Data B2
if2crq: IF2CRQ
0x80 - CAN IF2 Command Request
if2cmsk: IF2CMSK
0x84 - CAN IF2 Command Mask
if2msk1: IF2MSK1
0x88 - CAN IF2 Mask 1
if2msk2: IF2MSK2
0x8c - CAN IF2 Mask 2
if2arb1: IF2ARB1
0x90 - CAN IF2 Arbitration 1
if2arb2: IF2ARB2
0x94 - CAN IF2 Arbitration 2
if2mctl: IF2MCTL
0x98 - CAN IF2 Message Control
if2da1: IF2DA1
0x9c - CAN IF2 Data A1
if2da2: IF2DA2
0xa0 - CAN IF2 Data A2
if2db1: IF2DB1
0xa4 - CAN IF2 Data B1
if2db2: IF2DB2
0xa8 - CAN IF2 Data B2
txrq1: TXRQ1
0x100 - CAN Transmission Request 1
txrq2: TXRQ2
0x104 - CAN Transmission Request 2
nwda1: NWDA1
0x120 - CAN New Data 1
nwda2: NWDA2
0x124 - CAN New Data 2
msg1int: MSG1INT
0x140 - CAN Message 1 Interrupt Pending
msg2int: MSG2INT
0x144 - CAN Message 2 Interrupt Pending
msg1val: MSG1VAL
0x160 - CAN Message 1 Valid
msg2val: MSG2VAL
0x164 - CAN Message 2 Valid
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