1#[doc = r"Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r"Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CC {
10 #[doc = r"Modifies the contents of the register"]
11 #[inline(always)]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 self.register.set(f(&R { bits }, &mut W { bits }).bits);
18 }
19 #[doc = r"Reads the contents of the register"]
20 #[inline(always)]
21 pub fn read(&self) -> R {
22 R {
23 bits: self.register.get(),
24 }
25 }
26 #[doc = r"Writes to the register"]
27 #[inline(always)]
28 pub fn write<F>(&self, f: F)
29 where
30 F: FnOnce(&mut W) -> &mut W,
31 {
32 self.register.set(
33 f(&mut W {
34 bits: Self::reset_value(),
35 })
36 .bits,
37 );
38 }
39 #[doc = r"Reset value of the register"]
40 #[inline(always)]
41 pub const fn reset_value() -> u32 {
42 0
43 }
44 #[doc = r"Writes the reset value to the register"]
45 #[inline(always)]
46 pub fn reset(&self) {
47 self.register.set(Self::reset_value())
48 }
49}
50#[doc = "Possible values of the field `PWM_CC_PWMDIV`"]
51#[derive(Clone, Copy, Debug, PartialEq)]
52pub enum PWM_CC_PWMDIVR {
53 #[doc = "/2"]
54 PWM_CC_PWMDIV_2,
55 #[doc = "/4"]
56 PWM_CC_PWMDIV_4,
57 #[doc = "/8"]
58 PWM_CC_PWMDIV_8,
59 #[doc = "/16"]
60 PWM_CC_PWMDIV_16,
61 #[doc = "/32"]
62 PWM_CC_PWMDIV_32,
63 #[doc = "/64"]
64 PWM_CC_PWMDIV_64,
65 #[doc = r"Reserved"]
66 _Reserved(u8),
67}
68impl PWM_CC_PWMDIVR {
69 #[doc = r"Value of the field as raw bits"]
70 #[inline(always)]
71 pub fn bits(&self) -> u8 {
72 match *self {
73 PWM_CC_PWMDIVR::PWM_CC_PWMDIV_2 => 0,
74 PWM_CC_PWMDIVR::PWM_CC_PWMDIV_4 => 1,
75 PWM_CC_PWMDIVR::PWM_CC_PWMDIV_8 => 2,
76 PWM_CC_PWMDIVR::PWM_CC_PWMDIV_16 => 3,
77 PWM_CC_PWMDIVR::PWM_CC_PWMDIV_32 => 4,
78 PWM_CC_PWMDIVR::PWM_CC_PWMDIV_64 => 5,
79 PWM_CC_PWMDIVR::_Reserved(bits) => bits,
80 }
81 }
82 #[allow(missing_docs)]
83 #[doc(hidden)]
84 #[inline(always)]
85 pub fn _from(value: u8) -> PWM_CC_PWMDIVR {
86 match value {
87 0 => PWM_CC_PWMDIVR::PWM_CC_PWMDIV_2,
88 1 => PWM_CC_PWMDIVR::PWM_CC_PWMDIV_4,
89 2 => PWM_CC_PWMDIVR::PWM_CC_PWMDIV_8,
90 3 => PWM_CC_PWMDIVR::PWM_CC_PWMDIV_16,
91 4 => PWM_CC_PWMDIVR::PWM_CC_PWMDIV_32,
92 5 => PWM_CC_PWMDIVR::PWM_CC_PWMDIV_64,
93 i => PWM_CC_PWMDIVR::_Reserved(i),
94 }
95 }
96 #[doc = "Checks if the value of the field is `PWM_CC_PWMDIV_2`"]
97 #[inline(always)]
98 pub fn is_pwm_cc_pwmdiv_2(&self) -> bool {
99 *self == PWM_CC_PWMDIVR::PWM_CC_PWMDIV_2
100 }
101 #[doc = "Checks if the value of the field is `PWM_CC_PWMDIV_4`"]
102 #[inline(always)]
103 pub fn is_pwm_cc_pwmdiv_4(&self) -> bool {
104 *self == PWM_CC_PWMDIVR::PWM_CC_PWMDIV_4
105 }
106 #[doc = "Checks if the value of the field is `PWM_CC_PWMDIV_8`"]
107 #[inline(always)]
108 pub fn is_pwm_cc_pwmdiv_8(&self) -> bool {
109 *self == PWM_CC_PWMDIVR::PWM_CC_PWMDIV_8
110 }
111 #[doc = "Checks if the value of the field is `PWM_CC_PWMDIV_16`"]
112 #[inline(always)]
113 pub fn is_pwm_cc_pwmdiv_16(&self) -> bool {
114 *self == PWM_CC_PWMDIVR::PWM_CC_PWMDIV_16
115 }
116 #[doc = "Checks if the value of the field is `PWM_CC_PWMDIV_32`"]
117 #[inline(always)]
118 pub fn is_pwm_cc_pwmdiv_32(&self) -> bool {
119 *self == PWM_CC_PWMDIVR::PWM_CC_PWMDIV_32
120 }
121 #[doc = "Checks if the value of the field is `PWM_CC_PWMDIV_64`"]
122 #[inline(always)]
123 pub fn is_pwm_cc_pwmdiv_64(&self) -> bool {
124 *self == PWM_CC_PWMDIVR::PWM_CC_PWMDIV_64
125 }
126}
127#[doc = "Values that can be written to the field `PWM_CC_PWMDIV`"]
128#[derive(Clone, Copy, Debug, PartialEq)]
129pub enum PWM_CC_PWMDIVW {
130 #[doc = "/2"]
131 PWM_CC_PWMDIV_2,
132 #[doc = "/4"]
133 PWM_CC_PWMDIV_4,
134 #[doc = "/8"]
135 PWM_CC_PWMDIV_8,
136 #[doc = "/16"]
137 PWM_CC_PWMDIV_16,
138 #[doc = "/32"]
139 PWM_CC_PWMDIV_32,
140 #[doc = "/64"]
141 PWM_CC_PWMDIV_64,
142}
143impl PWM_CC_PWMDIVW {
144 #[allow(missing_docs)]
145 #[doc(hidden)]
146 #[inline(always)]
147 pub fn _bits(&self) -> u8 {
148 match *self {
149 PWM_CC_PWMDIVW::PWM_CC_PWMDIV_2 => 0,
150 PWM_CC_PWMDIVW::PWM_CC_PWMDIV_4 => 1,
151 PWM_CC_PWMDIVW::PWM_CC_PWMDIV_8 => 2,
152 PWM_CC_PWMDIVW::PWM_CC_PWMDIV_16 => 3,
153 PWM_CC_PWMDIVW::PWM_CC_PWMDIV_32 => 4,
154 PWM_CC_PWMDIVW::PWM_CC_PWMDIV_64 => 5,
155 }
156 }
157}
158#[doc = r"Proxy"]
159pub struct _PWM_CC_PWMDIVW<'a> {
160 w: &'a mut W,
161}
162impl<'a> _PWM_CC_PWMDIVW<'a> {
163 #[doc = r"Writes `variant` to the field"]
164 #[inline(always)]
165 pub fn variant(self, variant: PWM_CC_PWMDIVW) -> &'a mut W {
166 unsafe { self.bits(variant._bits()) }
167 }
168 #[doc = "/2"]
169 #[inline(always)]
170 pub fn pwm_cc_pwmdiv_2(self) -> &'a mut W {
171 self.variant(PWM_CC_PWMDIVW::PWM_CC_PWMDIV_2)
172 }
173 #[doc = "/4"]
174 #[inline(always)]
175 pub fn pwm_cc_pwmdiv_4(self) -> &'a mut W {
176 self.variant(PWM_CC_PWMDIVW::PWM_CC_PWMDIV_4)
177 }
178 #[doc = "/8"]
179 #[inline(always)]
180 pub fn pwm_cc_pwmdiv_8(self) -> &'a mut W {
181 self.variant(PWM_CC_PWMDIVW::PWM_CC_PWMDIV_8)
182 }
183 #[doc = "/16"]
184 #[inline(always)]
185 pub fn pwm_cc_pwmdiv_16(self) -> &'a mut W {
186 self.variant(PWM_CC_PWMDIVW::PWM_CC_PWMDIV_16)
187 }
188 #[doc = "/32"]
189 #[inline(always)]
190 pub fn pwm_cc_pwmdiv_32(self) -> &'a mut W {
191 self.variant(PWM_CC_PWMDIVW::PWM_CC_PWMDIV_32)
192 }
193 #[doc = "/64"]
194 #[inline(always)]
195 pub fn pwm_cc_pwmdiv_64(self) -> &'a mut W {
196 self.variant(PWM_CC_PWMDIVW::PWM_CC_PWMDIV_64)
197 }
198 #[doc = r"Writes raw bits to the field"]
199 #[inline(always)]
200 pub unsafe fn bits(self, value: u8) -> &'a mut W {
201 self.w.bits &= !(7 << 0);
202 self.w.bits |= ((value as u32) & 7) << 0;
203 self.w
204 }
205}
206#[doc = r"Value of the field"]
207pub struct PWM_CC_USEPWMR {
208 bits: bool,
209}
210impl PWM_CC_USEPWMR {
211 #[doc = r"Value of the field as raw bits"]
212 #[inline(always)]
213 pub fn bit(&self) -> bool {
214 self.bits
215 }
216 #[doc = r"Returns `true` if the bit is clear (0)"]
217 #[inline(always)]
218 pub fn bit_is_clear(&self) -> bool {
219 !self.bit()
220 }
221 #[doc = r"Returns `true` if the bit is set (1)"]
222 #[inline(always)]
223 pub fn bit_is_set(&self) -> bool {
224 self.bit()
225 }
226}
227#[doc = r"Proxy"]
228pub struct _PWM_CC_USEPWMW<'a> {
229 w: &'a mut W,
230}
231impl<'a> _PWM_CC_USEPWMW<'a> {
232 #[doc = r"Sets the field bit"]
233 #[inline(always)]
234 pub fn set_bit(self) -> &'a mut W {
235 self.bit(true)
236 }
237 #[doc = r"Clears the field bit"]
238 #[inline(always)]
239 pub fn clear_bit(self) -> &'a mut W {
240 self.bit(false)
241 }
242 #[doc = r"Writes raw bits to the field"]
243 #[inline(always)]
244 pub fn bit(self, value: bool) -> &'a mut W {
245 self.w.bits &= !(1 << 8);
246 self.w.bits |= ((value as u32) & 1) << 8;
247 self.w
248 }
249}
250impl R {
251 #[doc = r"Value of the register as raw bits"]
252 #[inline(always)]
253 pub fn bits(&self) -> u32 {
254 self.bits
255 }
256 #[doc = "Bits 0:2 - PWM Clock Divider"]
257 #[inline(always)]
258 pub fn pwm_cc_pwmdiv(&self) -> PWM_CC_PWMDIVR {
259 PWM_CC_PWMDIVR::_from(((self.bits >> 0) & 7) as u8)
260 }
261 #[doc = "Bit 8 - Use PWM Clock Divisor"]
262 #[inline(always)]
263 pub fn pwm_cc_usepwm(&self) -> PWM_CC_USEPWMR {
264 let bits = ((self.bits >> 8) & 1) != 0;
265 PWM_CC_USEPWMR { bits }
266 }
267}
268impl W {
269 #[doc = r"Writes raw bits to the register"]
270 #[inline(always)]
271 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
272 self.bits = bits;
273 self
274 }
275 #[doc = "Bits 0:2 - PWM Clock Divider"]
276 #[inline(always)]
277 pub fn pwm_cc_pwmdiv(&mut self) -> _PWM_CC_PWMDIVW {
278 _PWM_CC_PWMDIVW { w: self }
279 }
280 #[doc = "Bit 8 - Use PWM Clock Divisor"]
281 #[inline(always)]
282 pub fn pwm_cc_usepwm(&mut self) -> _PWM_CC_USEPWMW {
283 _PWM_CC_USEPWMW { w: self }
284 }
285}