1#[doc = "Register `TACCTL0` reader"]
2pub struct R(crate::R<TACCTL0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TACCTL0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TACCTL0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TACCTL0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TACCTL0` writer"]
17pub struct W(crate::W<TACCTL0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TACCTL0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TACCTL0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TACCTL0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CCIFG` reader - Capture/compare interrupt flag"]
38pub type CCIFG_R = crate::BitReader<bool>;
39#[doc = "Field `CCIFG` writer - Capture/compare interrupt flag"]
40pub type CCIFG_W<'a, const O: u8> =
41 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
42#[doc = "Field `COV` reader - Capture/compare overflow flag"]
43pub type COV_R = crate::BitReader<bool>;
44#[doc = "Field `COV` writer - Capture/compare overflow flag"]
45pub type COV_W<'a, const O: u8> =
46 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
47#[doc = "Field `OUT` reader - PWM Output signal if output mode 0"]
48pub type OUT_R = crate::BitReader<bool>;
49#[doc = "Field `OUT` writer - PWM Output signal if output mode 0"]
50pub type OUT_W<'a, const O: u8> =
51 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
52#[doc = "Field `CCI` reader - Capture input signal (read)"]
53pub type CCI_R = crate::BitReader<bool>;
54#[doc = "Field `CCI` writer - Capture input signal (read)"]
55pub type CCI_W<'a, const O: u8> =
56 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
57#[doc = "Field `CCIE` reader - Capture/compare interrupt enable"]
58pub type CCIE_R = crate::BitReader<bool>;
59#[doc = "Field `CCIE` writer - Capture/compare interrupt enable"]
60pub type CCIE_W<'a, const O: u8> =
61 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
62#[doc = "Field `OUTMOD` reader - Output mode 2"]
63pub type OUTMOD_R = crate::FieldReader<u8, OUTMOD_A>;
64#[doc = "Output mode 2\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66#[repr(u8)]
67pub enum OUTMOD_A {
68 #[doc = "0: PWM output mode: 0 - output only"]
69 OUTMOD_0 = 0,
70 #[doc = "1: PWM output mode: 1 - set"]
71 OUTMOD_1 = 1,
72 #[doc = "2: PWM output mode: 2 - PWM toggle/reset"]
73 OUTMOD_2 = 2,
74 #[doc = "3: PWM output mode: 3 - PWM set/reset"]
75 OUTMOD_3 = 3,
76 #[doc = "4: PWM output mode: 4 - toggle"]
77 OUTMOD_4 = 4,
78 #[doc = "5: PWM output mode: 5 - Reset"]
79 OUTMOD_5 = 5,
80 #[doc = "6: PWM output mode: 6 - PWM toggle/set"]
81 OUTMOD_6 = 6,
82 #[doc = "7: PWM output mode: 7 - PWM reset/set"]
83 OUTMOD_7 = 7,
84}
85impl From<OUTMOD_A> for u8 {
86 #[inline(always)]
87 fn from(variant: OUTMOD_A) -> Self {
88 variant as _
89 }
90}
91impl OUTMOD_R {
92 #[doc = "Get enumerated values variant"]
93 #[inline(always)]
94 pub fn variant(&self) -> OUTMOD_A {
95 match self.bits {
96 0 => OUTMOD_A::OUTMOD_0,
97 1 => OUTMOD_A::OUTMOD_1,
98 2 => OUTMOD_A::OUTMOD_2,
99 3 => OUTMOD_A::OUTMOD_3,
100 4 => OUTMOD_A::OUTMOD_4,
101 5 => OUTMOD_A::OUTMOD_5,
102 6 => OUTMOD_A::OUTMOD_6,
103 7 => OUTMOD_A::OUTMOD_7,
104 _ => unreachable!(),
105 }
106 }
107 #[doc = "Checks if the value of the field is `OUTMOD_0`"]
108 #[inline(always)]
109 pub fn is_outmod_0(&self) -> bool {
110 *self == OUTMOD_A::OUTMOD_0
111 }
112 #[doc = "Checks if the value of the field is `OUTMOD_1`"]
113 #[inline(always)]
114 pub fn is_outmod_1(&self) -> bool {
115 *self == OUTMOD_A::OUTMOD_1
116 }
117 #[doc = "Checks if the value of the field is `OUTMOD_2`"]
118 #[inline(always)]
119 pub fn is_outmod_2(&self) -> bool {
120 *self == OUTMOD_A::OUTMOD_2
121 }
122 #[doc = "Checks if the value of the field is `OUTMOD_3`"]
123 #[inline(always)]
124 pub fn is_outmod_3(&self) -> bool {
125 *self == OUTMOD_A::OUTMOD_3
126 }
127 #[doc = "Checks if the value of the field is `OUTMOD_4`"]
128 #[inline(always)]
129 pub fn is_outmod_4(&self) -> bool {
130 *self == OUTMOD_A::OUTMOD_4
131 }
132 #[doc = "Checks if the value of the field is `OUTMOD_5`"]
133 #[inline(always)]
134 pub fn is_outmod_5(&self) -> bool {
135 *self == OUTMOD_A::OUTMOD_5
136 }
137 #[doc = "Checks if the value of the field is `OUTMOD_6`"]
138 #[inline(always)]
139 pub fn is_outmod_6(&self) -> bool {
140 *self == OUTMOD_A::OUTMOD_6
141 }
142 #[doc = "Checks if the value of the field is `OUTMOD_7`"]
143 #[inline(always)]
144 pub fn is_outmod_7(&self) -> bool {
145 *self == OUTMOD_A::OUTMOD_7
146 }
147}
148#[doc = "Field `OUTMOD` writer - Output mode 2"]
149pub type OUTMOD_W<'a, const O: u8> =
150 crate::FieldWriterSafe<'a, u16, TACCTL0_SPEC, u8, OUTMOD_A, 3, O>;
151impl<'a, const O: u8> OUTMOD_W<'a, O> {
152 #[doc = "PWM output mode: 0 - output only"]
153 #[inline(always)]
154 pub fn outmod_0(self) -> &'a mut W {
155 self.variant(OUTMOD_A::OUTMOD_0)
156 }
157 #[doc = "PWM output mode: 1 - set"]
158 #[inline(always)]
159 pub fn outmod_1(self) -> &'a mut W {
160 self.variant(OUTMOD_A::OUTMOD_1)
161 }
162 #[doc = "PWM output mode: 2 - PWM toggle/reset"]
163 #[inline(always)]
164 pub fn outmod_2(self) -> &'a mut W {
165 self.variant(OUTMOD_A::OUTMOD_2)
166 }
167 #[doc = "PWM output mode: 3 - PWM set/reset"]
168 #[inline(always)]
169 pub fn outmod_3(self) -> &'a mut W {
170 self.variant(OUTMOD_A::OUTMOD_3)
171 }
172 #[doc = "PWM output mode: 4 - toggle"]
173 #[inline(always)]
174 pub fn outmod_4(self) -> &'a mut W {
175 self.variant(OUTMOD_A::OUTMOD_4)
176 }
177 #[doc = "PWM output mode: 5 - Reset"]
178 #[inline(always)]
179 pub fn outmod_5(self) -> &'a mut W {
180 self.variant(OUTMOD_A::OUTMOD_5)
181 }
182 #[doc = "PWM output mode: 6 - PWM toggle/set"]
183 #[inline(always)]
184 pub fn outmod_6(self) -> &'a mut W {
185 self.variant(OUTMOD_A::OUTMOD_6)
186 }
187 #[doc = "PWM output mode: 7 - PWM reset/set"]
188 #[inline(always)]
189 pub fn outmod_7(self) -> &'a mut W {
190 self.variant(OUTMOD_A::OUTMOD_7)
191 }
192}
193#[doc = "Field `CAP` reader - Capture mode: 1 /Compare mode : 0"]
194pub type CAP_R = crate::BitReader<bool>;
195#[doc = "Field `CAP` writer - Capture mode: 1 /Compare mode : 0"]
196pub type CAP_W<'a, const O: u8> =
197 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
198#[doc = "Field `SCCI` reader - Latched capture signal (read)"]
199pub type SCCI_R = crate::BitReader<bool>;
200#[doc = "Field `SCCI` writer - Latched capture signal (read)"]
201pub type SCCI_W<'a, const O: u8> =
202 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
203#[doc = "Field `SCS` reader - Capture sychronize"]
204pub type SCS_R = crate::BitReader<bool>;
205#[doc = "Field `SCS` writer - Capture sychronize"]
206pub type SCS_W<'a, const O: u8> =
207 crate::BitWriter<'a, u16, TACCTL0_SPEC, bool, O>;
208#[doc = "Field `CCIS` reader - Capture input select 1"]
209pub type CCIS_R = crate::FieldReader<u8, CCIS_A>;
210#[doc = "Capture input select 1\n\nValue on reset: 0"]
211#[derive(Clone, Copy, Debug, PartialEq, Eq)]
212#[repr(u8)]
213pub enum CCIS_A {
214 #[doc = "0: Capture input select: 0 - CCIxA"]
215 CCIS_0 = 0,
216 #[doc = "1: Capture input select: 1 - CCIxB"]
217 CCIS_1 = 1,
218 #[doc = "2: Capture input select: 2 - GND"]
219 CCIS_2 = 2,
220 #[doc = "3: Capture input select: 3 - Vcc"]
221 CCIS_3 = 3,
222}
223impl From<CCIS_A> for u8 {
224 #[inline(always)]
225 fn from(variant: CCIS_A) -> Self {
226 variant as _
227 }
228}
229impl CCIS_R {
230 #[doc = "Get enumerated values variant"]
231 #[inline(always)]
232 pub fn variant(&self) -> CCIS_A {
233 match self.bits {
234 0 => CCIS_A::CCIS_0,
235 1 => CCIS_A::CCIS_1,
236 2 => CCIS_A::CCIS_2,
237 3 => CCIS_A::CCIS_3,
238 _ => unreachable!(),
239 }
240 }
241 #[doc = "Checks if the value of the field is `CCIS_0`"]
242 #[inline(always)]
243 pub fn is_ccis_0(&self) -> bool {
244 *self == CCIS_A::CCIS_0
245 }
246 #[doc = "Checks if the value of the field is `CCIS_1`"]
247 #[inline(always)]
248 pub fn is_ccis_1(&self) -> bool {
249 *self == CCIS_A::CCIS_1
250 }
251 #[doc = "Checks if the value of the field is `CCIS_2`"]
252 #[inline(always)]
253 pub fn is_ccis_2(&self) -> bool {
254 *self == CCIS_A::CCIS_2
255 }
256 #[doc = "Checks if the value of the field is `CCIS_3`"]
257 #[inline(always)]
258 pub fn is_ccis_3(&self) -> bool {
259 *self == CCIS_A::CCIS_3
260 }
261}
262#[doc = "Field `CCIS` writer - Capture input select 1"]
263pub type CCIS_W<'a, const O: u8> =
264 crate::FieldWriterSafe<'a, u16, TACCTL0_SPEC, u8, CCIS_A, 2, O>;
265impl<'a, const O: u8> CCIS_W<'a, O> {
266 #[doc = "Capture input select: 0 - CCIxA"]
267 #[inline(always)]
268 pub fn ccis_0(self) -> &'a mut W {
269 self.variant(CCIS_A::CCIS_0)
270 }
271 #[doc = "Capture input select: 1 - CCIxB"]
272 #[inline(always)]
273 pub fn ccis_1(self) -> &'a mut W {
274 self.variant(CCIS_A::CCIS_1)
275 }
276 #[doc = "Capture input select: 2 - GND"]
277 #[inline(always)]
278 pub fn ccis_2(self) -> &'a mut W {
279 self.variant(CCIS_A::CCIS_2)
280 }
281 #[doc = "Capture input select: 3 - Vcc"]
282 #[inline(always)]
283 pub fn ccis_3(self) -> &'a mut W {
284 self.variant(CCIS_A::CCIS_3)
285 }
286}
287#[doc = "Field `CM` reader - Capture mode 1"]
288pub type CM_R = crate::FieldReader<u8, CM_A>;
289#[doc = "Capture mode 1\n\nValue on reset: 0"]
290#[derive(Clone, Copy, Debug, PartialEq, Eq)]
291#[repr(u8)]
292pub enum CM_A {
293 #[doc = "0: Capture mode: 0 - disabled"]
294 CM_0 = 0,
295 #[doc = "1: Capture mode: 1 - pos. edge"]
296 CM_1 = 1,
297 #[doc = "2: Capture mode: 1 - neg. edge"]
298 CM_2 = 2,
299 #[doc = "3: Capture mode: 1 - both edges"]
300 CM_3 = 3,
301}
302impl From<CM_A> for u8 {
303 #[inline(always)]
304 fn from(variant: CM_A) -> Self {
305 variant as _
306 }
307}
308impl CM_R {
309 #[doc = "Get enumerated values variant"]
310 #[inline(always)]
311 pub fn variant(&self) -> CM_A {
312 match self.bits {
313 0 => CM_A::CM_0,
314 1 => CM_A::CM_1,
315 2 => CM_A::CM_2,
316 3 => CM_A::CM_3,
317 _ => unreachable!(),
318 }
319 }
320 #[doc = "Checks if the value of the field is `CM_0`"]
321 #[inline(always)]
322 pub fn is_cm_0(&self) -> bool {
323 *self == CM_A::CM_0
324 }
325 #[doc = "Checks if the value of the field is `CM_1`"]
326 #[inline(always)]
327 pub fn is_cm_1(&self) -> bool {
328 *self == CM_A::CM_1
329 }
330 #[doc = "Checks if the value of the field is `CM_2`"]
331 #[inline(always)]
332 pub fn is_cm_2(&self) -> bool {
333 *self == CM_A::CM_2
334 }
335 #[doc = "Checks if the value of the field is `CM_3`"]
336 #[inline(always)]
337 pub fn is_cm_3(&self) -> bool {
338 *self == CM_A::CM_3
339 }
340}
341#[doc = "Field `CM` writer - Capture mode 1"]
342pub type CM_W<'a, const O: u8> =
343 crate::FieldWriterSafe<'a, u16, TACCTL0_SPEC, u8, CM_A, 2, O>;
344impl<'a, const O: u8> CM_W<'a, O> {
345 #[doc = "Capture mode: 0 - disabled"]
346 #[inline(always)]
347 pub fn cm_0(self) -> &'a mut W {
348 self.variant(CM_A::CM_0)
349 }
350 #[doc = "Capture mode: 1 - pos. edge"]
351 #[inline(always)]
352 pub fn cm_1(self) -> &'a mut W {
353 self.variant(CM_A::CM_1)
354 }
355 #[doc = "Capture mode: 1 - neg. edge"]
356 #[inline(always)]
357 pub fn cm_2(self) -> &'a mut W {
358 self.variant(CM_A::CM_2)
359 }
360 #[doc = "Capture mode: 1 - both edges"]
361 #[inline(always)]
362 pub fn cm_3(self) -> &'a mut W {
363 self.variant(CM_A::CM_3)
364 }
365}
366impl R {
367 #[doc = "Bit 0 - Capture/compare interrupt flag"]
368 #[inline(always)]
369 pub fn ccifg(&self) -> CCIFG_R {
370 CCIFG_R::new((self.bits & 1) != 0)
371 }
372 #[doc = "Bit 1 - Capture/compare overflow flag"]
373 #[inline(always)]
374 pub fn cov(&self) -> COV_R {
375 COV_R::new(((self.bits >> 1) & 1) != 0)
376 }
377 #[doc = "Bit 2 - PWM Output signal if output mode 0"]
378 #[inline(always)]
379 pub fn out(&self) -> OUT_R {
380 OUT_R::new(((self.bits >> 2) & 1) != 0)
381 }
382 #[doc = "Bit 3 - Capture input signal (read)"]
383 #[inline(always)]
384 pub fn cci(&self) -> CCI_R {
385 CCI_R::new(((self.bits >> 3) & 1) != 0)
386 }
387 #[doc = "Bit 4 - Capture/compare interrupt enable"]
388 #[inline(always)]
389 pub fn ccie(&self) -> CCIE_R {
390 CCIE_R::new(((self.bits >> 4) & 1) != 0)
391 }
392 #[doc = "Bits 5:7 - Output mode 2"]
393 #[inline(always)]
394 pub fn outmod(&self) -> OUTMOD_R {
395 OUTMOD_R::new(((self.bits >> 5) & 7) as u8)
396 }
397 #[doc = "Bit 8 - Capture mode: 1 /Compare mode : 0"]
398 #[inline(always)]
399 pub fn cap(&self) -> CAP_R {
400 CAP_R::new(((self.bits >> 8) & 1) != 0)
401 }
402 #[doc = "Bit 10 - Latched capture signal (read)"]
403 #[inline(always)]
404 pub fn scci(&self) -> SCCI_R {
405 SCCI_R::new(((self.bits >> 10) & 1) != 0)
406 }
407 #[doc = "Bit 11 - Capture sychronize"]
408 #[inline(always)]
409 pub fn scs(&self) -> SCS_R {
410 SCS_R::new(((self.bits >> 11) & 1) != 0)
411 }
412 #[doc = "Bits 12:13 - Capture input select 1"]
413 #[inline(always)]
414 pub fn ccis(&self) -> CCIS_R {
415 CCIS_R::new(((self.bits >> 12) & 3) as u8)
416 }
417 #[doc = "Bits 14:15 - Capture mode 1"]
418 #[inline(always)]
419 pub fn cm(&self) -> CM_R {
420 CM_R::new(((self.bits >> 14) & 3) as u8)
421 }
422}
423impl W {
424 #[doc = "Bit 0 - Capture/compare interrupt flag"]
425 #[inline(always)]
426 pub fn ccifg(&mut self) -> CCIFG_W<0> {
427 CCIFG_W::new(self)
428 }
429 #[doc = "Bit 1 - Capture/compare overflow flag"]
430 #[inline(always)]
431 pub fn cov(&mut self) -> COV_W<1> {
432 COV_W::new(self)
433 }
434 #[doc = "Bit 2 - PWM Output signal if output mode 0"]
435 #[inline(always)]
436 pub fn out(&mut self) -> OUT_W<2> {
437 OUT_W::new(self)
438 }
439 #[doc = "Bit 3 - Capture input signal (read)"]
440 #[inline(always)]
441 pub fn cci(&mut self) -> CCI_W<3> {
442 CCI_W::new(self)
443 }
444 #[doc = "Bit 4 - Capture/compare interrupt enable"]
445 #[inline(always)]
446 pub fn ccie(&mut self) -> CCIE_W<4> {
447 CCIE_W::new(self)
448 }
449 #[doc = "Bits 5:7 - Output mode 2"]
450 #[inline(always)]
451 pub fn outmod(&mut self) -> OUTMOD_W<5> {
452 OUTMOD_W::new(self)
453 }
454 #[doc = "Bit 8 - Capture mode: 1 /Compare mode : 0"]
455 #[inline(always)]
456 pub fn cap(&mut self) -> CAP_W<8> {
457 CAP_W::new(self)
458 }
459 #[doc = "Bit 10 - Latched capture signal (read)"]
460 #[inline(always)]
461 pub fn scci(&mut self) -> SCCI_W<10> {
462 SCCI_W::new(self)
463 }
464 #[doc = "Bit 11 - Capture sychronize"]
465 #[inline(always)]
466 pub fn scs(&mut self) -> SCS_W<11> {
467 SCS_W::new(self)
468 }
469 #[doc = "Bits 12:13 - Capture input select 1"]
470 #[inline(always)]
471 pub fn ccis(&mut self) -> CCIS_W<12> {
472 CCIS_W::new(self)
473 }
474 #[doc = "Bits 14:15 - Capture mode 1"]
475 #[inline(always)]
476 pub fn cm(&mut self) -> CM_W<14> {
477 CM_W::new(self)
478 }
479 #[doc = "Writes raw bits to the register."]
480 #[inline(always)]
481 pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
482 self.0.bits(bits);
483 self
484 }
485}
486#[doc = "Timer0_A3 Capture/Compare Control 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tacctl0](index.html) module"]
487pub struct TACCTL0_SPEC;
488impl crate::RegisterSpec for TACCTL0_SPEC {
489 type Ux = u16;
490}
491#[doc = "`read()` method returns [tacctl0::R](R) reader structure"]
492impl crate::Readable for TACCTL0_SPEC {
493 type Reader = R;
494}
495#[doc = "`write(|w| ..)` method takes [tacctl0::W](W) writer structure"]
496impl crate::Writable for TACCTL0_SPEC {
497 type Writer = W;
498}
499#[doc = "`reset()` method sets TACCTL0 to value 0"]
500impl crate::Resettable for TACCTL0_SPEC {
501 #[inline(always)]
502 fn reset_value() -> Self::Ux {
503 0
504 }
505}