1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - ADC10 Data Transfer Control 0"]
5 pub adc10dtc0: ADC10DTC0,
6 #[doc = "0x01 - ADC10 Data Transfer Control 1"]
7 pub adc10dtc1: ADC10DTC1,
8 #[doc = "0x02 - ADC10 Analog Enable 0"]
9 pub adc10ae0: ADC10AE0,
10 _reserved3: [u8; 0x0165],
11 #[doc = "0x168 - ADC10 Control 0"]
12 pub adc10ctl0: ADC10CTL0,
13 #[doc = "0x16a - ADC10 Control 1"]
14 pub adc10ctl1: ADC10CTL1,
15 #[doc = "0x16c - ADC10 Memory"]
16 pub adc10mem: ADC10MEM,
17 _reserved6: [u8; 0x06],
18 #[doc = "0x174 - ADC10 Data Transfer Start Address"]
19 pub adc10sa: ADC10SA,
20}
21#[doc = "ADC10DTC0 (rw) register accessor: an alias for `Reg<ADC10DTC0_SPEC>`"]
22pub type ADC10DTC0 = crate::Reg<adc10dtc0::ADC10DTC0_SPEC>;
23#[doc = "ADC10 Data Transfer Control 0"]
24pub mod adc10dtc0;
25#[doc = "ADC10DTC1 (rw) register accessor: an alias for `Reg<ADC10DTC1_SPEC>`"]
26pub type ADC10DTC1 = crate::Reg<adc10dtc1::ADC10DTC1_SPEC>;
27#[doc = "ADC10 Data Transfer Control 1"]
28pub mod adc10dtc1;
29#[doc = "ADC10AE0 (rw) register accessor: an alias for `Reg<ADC10AE0_SPEC>`"]
30pub type ADC10AE0 = crate::Reg<adc10ae0::ADC10AE0_SPEC>;
31#[doc = "ADC10 Analog Enable 0"]
32pub mod adc10ae0;
33#[doc = "ADC10CTL0 (rw) register accessor: an alias for `Reg<ADC10CTL0_SPEC>`"]
34pub type ADC10CTL0 = crate::Reg<adc10ctl0::ADC10CTL0_SPEC>;
35#[doc = "ADC10 Control 0"]
36pub mod adc10ctl0;
37#[doc = "ADC10CTL1 (rw) register accessor: an alias for `Reg<ADC10CTL1_SPEC>`"]
38pub type ADC10CTL1 = crate::Reg<adc10ctl1::ADC10CTL1_SPEC>;
39#[doc = "ADC10 Control 1"]
40pub mod adc10ctl1;
41#[doc = "ADC10MEM (rw) register accessor: an alias for `Reg<ADC10MEM_SPEC>`"]
42pub type ADC10MEM = crate::Reg<adc10mem::ADC10MEM_SPEC>;
43#[doc = "ADC10 Memory"]
44pub mod adc10mem;
45#[doc = "ADC10SA (rw) register accessor: an alias for `Reg<ADC10SA_SPEC>`"]
46pub type ADC10SA = crate::Reg<adc10sa::ADC10SA_SPEC>;
47#[doc = "ADC10 Data Transfer Start Address"]
48pub mod adc10sa;