Module msp430fr6972::dma[][src]

DMA

Modules

dma0ctl

DMA Channel 0 Control

dma0da

DMA Channel 0 Destination Address

dma0sa

DMA Channel 0 Source Address

dma0sz

DMA Channel 0 Transfer Size

dma1ctl

DMA Channel 1 Control

dma1da

DMA Channel 1 Destination Address

dma1sa

DMA Channel 1 Source Address

dma1sz

DMA Channel 1 Transfer Size

dma2ctl

DMA Channel 2 Control

dma2da

DMA Channel 2 Destination Address

dma2sa

DMA Channel 2 Source Address

dma2sz

DMA Channel 2 Transfer Size

dmactl0

DMA Module Control 0

dmactl1

DMA Module Control 1

dmactl2

DMA Module Control 2

dmactl3

DMA Module Control 3

dmactl4

DMA Module Control 4

dmaiv

DMA Interrupt Vector Word

Structs

RegisterBlock

Register block

Type Definitions

DMA0CTL

DMA0CTL register accessor: an alias for Reg<DMA0CTL_SPEC>

DMA0DA

DMA0DA register accessor: an alias for Reg<DMA0DA_SPEC>

DMA0SA

DMA0SA register accessor: an alias for Reg<DMA0SA_SPEC>

DMA0SZ

DMA0SZ register accessor: an alias for Reg<DMA0SZ_SPEC>

DMA1CTL

DMA1CTL register accessor: an alias for Reg<DMA1CTL_SPEC>

DMA1DA

DMA1DA register accessor: an alias for Reg<DMA1DA_SPEC>

DMA1SA

DMA1SA register accessor: an alias for Reg<DMA1SA_SPEC>

DMA1SZ

DMA1SZ register accessor: an alias for Reg<DMA1SZ_SPEC>

DMA2CTL

DMA2CTL register accessor: an alias for Reg<DMA2CTL_SPEC>

DMA2DA

DMA2DA register accessor: an alias for Reg<DMA2DA_SPEC>

DMA2SA

DMA2SA register accessor: an alias for Reg<DMA2SA_SPEC>

DMA2SZ

DMA2SZ register accessor: an alias for Reg<DMA2SZ_SPEC>

DMACTL0

DMACTL0 register accessor: an alias for Reg<DMACTL0_SPEC>

DMACTL1

DMACTL1 register accessor: an alias for Reg<DMACTL1_SPEC>

DMACTL2

DMACTL2 register accessor: an alias for Reg<DMACTL2_SPEC>

DMACTL3

DMACTL3 register accessor: an alias for Reg<DMACTL3_SPEC>

DMACTL4

DMACTL4 register accessor: an alias for Reg<DMACTL4_SPEC>

DMAIV

DMAIV register accessor: an alias for Reg<DMAIV_SPEC>