Register UCA0MCTLW
writer
Bit 0 - USCI 16-times Oversampling enable
Bits 4:7 - USCI First Stage Modulation Select 3
Bit 8 - USCI Second Stage Modulation Select 0
Bit 9 - USCI Second Stage Modulation Select 1
Bit 10 - USCI Second Stage Modulation Select 2
Bit 11 - USCI Second Stage Modulation Select 3
Bit 12 - USCI Second Stage Modulation Select 4
Bit 13 - USCI Second Stage Modulation Select 5
Bit 14 - USCI Second Stage Modulation Select 6
Bit 15 - USCI Second Stage Modulation Select 7
pub unsafe fn bits(&mut self, bits: u16) -> &mut Self
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Writes raw bits to the register.
pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self
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Writes raw bits to the register.
The resulting type after dereferencing.
Mutably dereferences the value.
impl<T> Any for T where
T: 'static + ?Sized,
[src]
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more
impl<T, U> Into<U> for T where
U: From<T>,
[src]
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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The type returned in the event of a conversion error.
The type returned in the event of a conversion error.