Struct msp430fr6972::port_1_2::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {
Show fields
    pub p1in: Reg<P1IN_SPEC>,
    pub p2in: Reg<P2IN_SPEC>,
    pub p1out: Reg<P1OUT_SPEC>,
    pub p2out: Reg<P2OUT_SPEC>,
    pub p1dir: Reg<P1DIR_SPEC>,
    pub p2dir: Reg<P2DIR_SPEC>,
    pub p1ren: Reg<P1REN_SPEC>,
    pub p2ren: Reg<P2REN_SPEC>,
    pub p1sel0: Reg<P1SEL0_SPEC>,
    pub p2sel0: Reg<P2SEL0_SPEC>,
    pub p1sel1: Reg<P1SEL1_SPEC>,
    pub p2sel1: Reg<P2SEL1_SPEC>,
    pub p1iv: Reg<P1IV_SPEC>,
    pub p1selc: Reg<P1SELC_SPEC>,
    pub p2selc: Reg<P2SELC_SPEC>,
    pub p1ies: Reg<P1IES_SPEC>,
    pub p2ies: Reg<P2IES_SPEC>,
    pub p1ie: Reg<P1IE_SPEC>,
    pub p2ie: Reg<P2IE_SPEC>,
    pub p1ifg: Reg<P1IFG_SPEC>,
    pub p2ifg: Reg<P2IFG_SPEC>,
    pub p2iv: Reg<P2IV_SPEC>,
    // some fields omitted

}

Register block

Fields

p1in: Reg<P1IN_SPEC>

0x00 - Port 1 Input

p2in: Reg<P2IN_SPEC>

0x01 - Port 2 Input

p1out: Reg<P1OUT_SPEC>

0x02 - Port 1 Output

p2out: Reg<P2OUT_SPEC>

0x03 - Port 2 Output

p1dir: Reg<P1DIR_SPEC>

0x04 - Port 1 Direction

p2dir: Reg<P2DIR_SPEC>

0x05 - Port 2 Direction

p1ren: Reg<P1REN_SPEC>

0x06 - Port 1 Resistor Enable

p2ren: Reg<P2REN_SPEC>

0x07 - Port 2 Resistor Enable

p1sel0: Reg<P1SEL0_SPEC>

0x0a - Port 1 Selection 0

p2sel0: Reg<P2SEL0_SPEC>

0x0b - Port 2 Selection 0

p1sel1: Reg<P1SEL1_SPEC>

0x0c - Port 1 Selection 1

p2sel1: Reg<P2SEL1_SPEC>

0x0d - Port 2 Selection 1

p1iv: Reg<P1IV_SPEC>

0x0e - Port 1 Interrupt Vector Word

p1selc: Reg<P1SELC_SPEC>

0x16 - Port 1 Complement Selection

p2selc: Reg<P2SELC_SPEC>

0x17 - Port 2 Complement Selection

p1ies: Reg<P1IES_SPEC>

0x18 - Port 1 Interrupt Edge Select

p2ies: Reg<P2IES_SPEC>

0x19 - Port 2 Interrupt Edge Select

p1ie: Reg<P1IE_SPEC>

0x1a - Port 1 Interrupt Enable

p2ie: Reg<P2IE_SPEC>

0x1b - Port 2 Interrupt Enable

p1ifg: Reg<P1IFG_SPEC>

0x1c - Port 1 Interrupt Flag

p2ifg: Reg<P2IFG_SPEC>

0x1d - Port 2 Interrupt Flag

p2iv: Reg<P2IV_SPEC>

0x1e - Port 2 Interrupt Vector Word

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