Struct msp430fr6972::adc12::adc12ctl1::ADC12DIV_W [−][src]
pub struct ADC12DIV_W<'a> { /* fields omitted */ }
Field ADC12DIV
writer - ADC12 Clock Divider Select Bit: 0
Implementations
impl<'a> ADC12DIV_W<'a>
[src]
impl<'a> ADC12DIV_W<'a>
[src]pub fn variant(self, variant: ADC12DIV_A) -> &'a mut W
[src]
pub fn variant(self, variant: ADC12DIV_A) -> &'a mut W
[src]Writes variant
to the field
pub fn adc12div_0(self) -> &'a mut W
[src]
pub fn adc12div_0(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 0
pub fn adc12div_1(self) -> &'a mut W
[src]
pub fn adc12div_1(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 1
pub fn adc12div_2(self) -> &'a mut W
[src]
pub fn adc12div_2(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 2
pub fn adc12div_3(self) -> &'a mut W
[src]
pub fn adc12div_3(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 3
pub fn adc12div_4(self) -> &'a mut W
[src]
pub fn adc12div_4(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 4
pub fn adc12div_5(self) -> &'a mut W
[src]
pub fn adc12div_5(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 5
pub fn adc12div_6(self) -> &'a mut W
[src]
pub fn adc12div_6(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 6
pub fn adc12div_7(self) -> &'a mut W
[src]
pub fn adc12div_7(self) -> &'a mut W
[src]ADC12 Clock Divider Select: 7