Struct msp430fr6972::usci_a0_spi_mode::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {
    pub uca0ctl1_spi: Reg<UCA0CTL1_SPI_SPEC>,
    pub uca0ctl0_spi: Reg<UCA0CTL0_SPI_SPEC>,
    pub uca0br0_spi: Reg<UCA0BR0_SPI_SPEC>,
    pub uca0br1_spi: Reg<UCA0BR1_SPI_SPEC>,
    pub uca0statw_spi: Reg<UCA0STATW_SPI_SPEC>,
    pub uca0rxbuf_spi: Reg<UCA0RXBUF_SPI_SPEC>,
    pub uca0txbuf_spi: Reg<UCA0TXBUF_SPI_SPEC>,
    pub uca0ie_spi: Reg<UCA0IE_SPI_SPEC>,
    pub uca0ifg_spi: Reg<UCA0IFG_SPI_SPEC>,
    pub uca0iv_spi: Reg<UCA0IV_SPI_SPEC>,
    // some fields omitted
}

Register block

Fields

uca0ctl1_spi: Reg<UCA0CTL1_SPI_SPEC>

0x00 - USCI A0 Control Register 1

uca0ctl0_spi: Reg<UCA0CTL0_SPI_SPEC>

0x01 - USCI A0 Control Register 0

uca0br0_spi: Reg<UCA0BR0_SPI_SPEC>

0x06 - USCI A0 Baud Rate 0

uca0br1_spi: Reg<UCA0BR1_SPI_SPEC>

0x07 - USCI A0 Baud Rate 1

uca0statw_spi: Reg<UCA0STATW_SPI_SPEC>

0x0a - USCI A0 Status Register

uca0rxbuf_spi: Reg<UCA0RXBUF_SPI_SPEC>

0x0c - USCI A0 Receive Buffer

uca0txbuf_spi: Reg<UCA0TXBUF_SPI_SPEC>

0x0e - USCI A0 Transmit Buffer

uca0ie_spi: Reg<UCA0IE_SPI_SPEC>

0x1a - USCI A0 Interrupt Enable Register

uca0ifg_spi: Reg<UCA0IFG_SPI_SPEC>

0x1c - USCI A0 Interrupt Flags Register

uca0iv_spi: Reg<UCA0IV_SPI_SPEC>

0x1e - USCI A0 Interrupt Vector Register

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