Struct msp430fr6972::timer_0_b7::RegisterBlock[−][src]

#[repr(C)]
pub struct RegisterBlock {
Show fields
    pub tb0ctl: Reg<TB0CTL_SPEC>,
    pub tb0cctl0: Reg<TB0CCTL0_SPEC>,
    pub tb0cctl1: Reg<TB0CCTL1_SPEC>,
    pub tb0cctl2: Reg<TB0CCTL2_SPEC>,
    pub tb0cctl3: Reg<TB0CCTL3_SPEC>,
    pub tb0cctl4: Reg<TB0CCTL4_SPEC>,
    pub tb0cctl5: Reg<TB0CCTL5_SPEC>,
    pub tb0cctl6: Reg<TB0CCTL6_SPEC>,
    pub tb0r: Reg<TB0R_SPEC>,
    pub tb0ccr0: Reg<TB0CCR0_SPEC>,
    pub tb0ccr1: Reg<TB0CCR1_SPEC>,
    pub tb0ccr2: Reg<TB0CCR2_SPEC>,
    pub tb0ccr3: Reg<TB0CCR3_SPEC>,
    pub tb0ccr4: Reg<TB0CCR4_SPEC>,
    pub tb0ccr5: Reg<TB0CCR5_SPEC>,
    pub tb0ccr6: Reg<TB0CCR6_SPEC>,
    pub tb0ex0: Reg<TB0EX0_SPEC>,
    pub tb0iv: Reg<TB0IV_SPEC>,
    // some fields omitted

}

Register block

Fields

tb0ctl: Reg<TB0CTL_SPEC>

0x00 - Timer0_B7 Control

tb0cctl0: Reg<TB0CCTL0_SPEC>

0x02 - Timer0_B7 Capture/Compare Control 0

tb0cctl1: Reg<TB0CCTL1_SPEC>

0x04 - Timer0_B7 Capture/Compare Control 1

tb0cctl2: Reg<TB0CCTL2_SPEC>

0x06 - Timer0_B7 Capture/Compare Control 2

tb0cctl3: Reg<TB0CCTL3_SPEC>

0x08 - Timer0_B7 Capture/Compare Control 3

tb0cctl4: Reg<TB0CCTL4_SPEC>

0x0a - Timer0_B7 Capture/Compare Control 4

tb0cctl5: Reg<TB0CCTL5_SPEC>

0x0c - Timer0_B7 Capture/Compare Control 5

tb0cctl6: Reg<TB0CCTL6_SPEC>

0x0e - Timer0_B7 Capture/Compare Control 6

tb0r: Reg<TB0R_SPEC>

0x10 - Timer0_B7

tb0ccr0: Reg<TB0CCR0_SPEC>

0x12 - Timer0_B7 Capture/Compare 0

tb0ccr1: Reg<TB0CCR1_SPEC>

0x14 - Timer0_B7 Capture/Compare 1

tb0ccr2: Reg<TB0CCR2_SPEC>

0x16 - Timer0_B7 Capture/Compare 2

tb0ccr3: Reg<TB0CCR3_SPEC>

0x18 - Timer0_B7 Capture/Compare 3

tb0ccr4: Reg<TB0CCR4_SPEC>

0x1a - Timer0_B7 Capture/Compare 4

tb0ccr5: Reg<TB0CCR5_SPEC>

0x1c - Timer0_B7 Capture/Compare 5

tb0ccr6: Reg<TB0CCR6_SPEC>

0x1e - Timer0_B7 Capture/Compare 6

tb0ex0: Reg<TB0EX0_SPEC>

0x20 - Timer0_B7 Expansion Register 0

tb0iv: Reg<TB0IV_SPEC>

0x2e - Timer0_B7 Interrupt Vector Word

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