msp430fr5962/
p2.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    _reserved0: [u8; 0x01],
5    p2in: P2in,
6    _reserved1: [u8; 0x01],
7    p2out: P2out,
8    _reserved2: [u8; 0x01],
9    p2dir: P2dir,
10    _reserved3: [u8; 0x01],
11    p2ren: P2ren,
12    _reserved4: [u8; 0x03],
13    p2sel0: P2sel0,
14    _reserved5: [u8; 0x01],
15    p2sel1: P2sel1,
16    _reserved6: [u8; 0x09],
17    p2selc: P2selc,
18    _reserved7: [u8; 0x01],
19    p2ies: P2ies,
20    _reserved8: [u8; 0x01],
21    p2ie: P2ie,
22    _reserved9: [u8; 0x01],
23    p2ifg: P2ifg,
24    p2iv: P2iv,
25}
26impl RegisterBlock {
27    #[doc = "0x01 - Port 2 Input"]
28    #[inline(always)]
29    pub const fn p2in(&self) -> &P2in {
30        &self.p2in
31    }
32    #[doc = "0x03 - Port 2 Output"]
33    #[inline(always)]
34    pub const fn p2out(&self) -> &P2out {
35        &self.p2out
36    }
37    #[doc = "0x05 - Port 2 Direction"]
38    #[inline(always)]
39    pub const fn p2dir(&self) -> &P2dir {
40        &self.p2dir
41    }
42    #[doc = "0x07 - Port 2 Resistor Enable"]
43    #[inline(always)]
44    pub const fn p2ren(&self) -> &P2ren {
45        &self.p2ren
46    }
47    #[doc = "0x0b - Port 2 Select 0"]
48    #[inline(always)]
49    pub const fn p2sel0(&self) -> &P2sel0 {
50        &self.p2sel0
51    }
52    #[doc = "0x0d - Port 2 Select 1"]
53    #[inline(always)]
54    pub const fn p2sel1(&self) -> &P2sel1 {
55        &self.p2sel1
56    }
57    #[doc = "0x17 - Port 2 Complement Select"]
58    #[inline(always)]
59    pub const fn p2selc(&self) -> &P2selc {
60        &self.p2selc
61    }
62    #[doc = "0x19 - Port 2 Interrupt Edge Select"]
63    #[inline(always)]
64    pub const fn p2ies(&self) -> &P2ies {
65        &self.p2ies
66    }
67    #[doc = "0x1b - Port 2 Interrupt Enable"]
68    #[inline(always)]
69    pub const fn p2ie(&self) -> &P2ie {
70        &self.p2ie
71    }
72    #[doc = "0x1d - Port 2 Interrupt Flag"]
73    #[inline(always)]
74    pub const fn p2ifg(&self) -> &P2ifg {
75        &self.p2ifg
76    }
77    #[doc = "0x1e - Port 2 Interrupt Vector Register"]
78    #[inline(always)]
79    pub const fn p2iv(&self) -> &P2iv {
80        &self.p2iv
81    }
82}
83#[doc = "P2IV (rw) register accessor: Port 2 Interrupt Vector Register\n\nYou can [`read`](crate::Reg::read) this register and get [`p2iv::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2iv::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2iv`]
84module"]
85#[doc(alias = "P2IV")]
86pub type P2iv = crate::Reg<p2iv::P2ivSpec>;
87#[doc = "Port 2 Interrupt Vector Register"]
88pub mod p2iv;
89#[doc = "P2IN (rw) register accessor: Port 2 Input\n\nYou can [`read`](crate::Reg::read) this register and get [`p2in::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2in::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2in`]
90module"]
91#[doc(alias = "P2IN")]
92pub type P2in = crate::Reg<p2in::P2inSpec>;
93#[doc = "Port 2 Input"]
94pub mod p2in;
95#[doc = "P2OUT (rw) register accessor: Port 2 Output\n\nYou can [`read`](crate::Reg::read) this register and get [`p2out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2out`]
96module"]
97#[doc(alias = "P2OUT")]
98pub type P2out = crate::Reg<p2out::P2outSpec>;
99#[doc = "Port 2 Output"]
100pub mod p2out;
101#[doc = "P2DIR (rw) register accessor: Port 2 Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`p2dir::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2dir::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2dir`]
102module"]
103#[doc(alias = "P2DIR")]
104pub type P2dir = crate::Reg<p2dir::P2dirSpec>;
105#[doc = "Port 2 Direction"]
106pub mod p2dir;
107#[doc = "P2REN (rw) register accessor: Port 2 Resistor Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`p2ren::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2ren::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2ren`]
108module"]
109#[doc(alias = "P2REN")]
110pub type P2ren = crate::Reg<p2ren::P2renSpec>;
111#[doc = "Port 2 Resistor Enable"]
112pub mod p2ren;
113#[doc = "P2SEL0 (rw) register accessor: Port 2 Select 0\n\nYou can [`read`](crate::Reg::read) this register and get [`p2sel0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2sel0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2sel0`]
114module"]
115#[doc(alias = "P2SEL0")]
116pub type P2sel0 = crate::Reg<p2sel0::P2sel0Spec>;
117#[doc = "Port 2 Select 0"]
118pub mod p2sel0;
119#[doc = "P2SEL1 (rw) register accessor: Port 2 Select 1\n\nYou can [`read`](crate::Reg::read) this register and get [`p2sel1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2sel1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2sel1`]
120module"]
121#[doc(alias = "P2SEL1")]
122pub type P2sel1 = crate::Reg<p2sel1::P2sel1Spec>;
123#[doc = "Port 2 Select 1"]
124pub mod p2sel1;
125#[doc = "P2SELC (rw) register accessor: Port 2 Complement Select\n\nYou can [`read`](crate::Reg::read) this register and get [`p2selc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2selc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2selc`]
126module"]
127#[doc(alias = "P2SELC")]
128pub type P2selc = crate::Reg<p2selc::P2selcSpec>;
129#[doc = "Port 2 Complement Select"]
130pub mod p2selc;
131#[doc = "P2IES (rw) register accessor: Port 2 Interrupt Edge Select\n\nYou can [`read`](crate::Reg::read) this register and get [`p2ies::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2ies::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2ies`]
132module"]
133#[doc(alias = "P2IES")]
134pub type P2ies = crate::Reg<p2ies::P2iesSpec>;
135#[doc = "Port 2 Interrupt Edge Select"]
136pub mod p2ies;
137#[doc = "P2IE (rw) register accessor: Port 2 Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`p2ie::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2ie::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2ie`]
138module"]
139#[doc(alias = "P2IE")]
140pub type P2ie = crate::Reg<p2ie::P2ieSpec>;
141#[doc = "Port 2 Interrupt Enable"]
142pub mod p2ie;
143#[doc = "P2IFG (rw) register accessor: Port 2 Interrupt Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`p2ifg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`p2ifg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@p2ifg`]
144module"]
145#[doc(alias = "P2IFG")]
146pub type P2ifg = crate::Reg<p2ifg::P2ifgSpec>;
147#[doc = "Port 2 Interrupt Flag"]
148pub mod p2ifg;