msp430fr247x/cs/
csctl0.rs

1#[doc = "Register `CSCTL0` reader"]
2pub struct R(crate::R<CSCTL0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CSCTL0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CSCTL0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CSCTL0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CSCTL0` writer"]
17pub struct W(crate::W<CSCTL0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CSCTL0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CSCTL0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CSCTL0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DCO` reader - DCO tap selection. These bits select the DCO tap and are modified automatically during FLL operation."]
38pub type DCO_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `DCO` writer - DCO tap selection. These bits select the DCO tap and are modified automatically during FLL operation."]
40pub type DCO_W<'a, const O: u8> = crate::FieldWriter<'a, u16, CSCTL0_SPEC, u16, u16, 9, O>;
41#[doc = "Field `MOD` reader - Modulation bit counter. These bits select the modulation pattern. All MOD bits are modified automatically during FLL operation. The DCO register value is incremented when the modulation bit counter rolls over from 31 to 0. If the modulation bit counter decrements from 0 to the maximum count, the DCO register value is also decreased."]
42pub type MOD_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `MOD` writer - Modulation bit counter. These bits select the modulation pattern. All MOD bits are modified automatically during FLL operation. The DCO register value is incremented when the modulation bit counter rolls over from 31 to 0. If the modulation bit counter decrements from 0 to the maximum count, the DCO register value is also decreased."]
44pub type MOD_W<'a, const O: u8> = crate::FieldWriter<'a, u16, CSCTL0_SPEC, u8, u8, 5, O>;
45impl R {
46    #[doc = "Bits 0:8 - DCO tap selection. These bits select the DCO tap and are modified automatically during FLL operation."]
47    #[inline(always)]
48    pub fn dco(&self) -> DCO_R {
49        DCO_R::new(self.bits & 0x01ff)
50    }
51    #[doc = "Bits 9:13 - Modulation bit counter. These bits select the modulation pattern. All MOD bits are modified automatically during FLL operation. The DCO register value is incremented when the modulation bit counter rolls over from 31 to 0. If the modulation bit counter decrements from 0 to the maximum count, the DCO register value is also decreased."]
52    #[inline(always)]
53    pub fn mod_(&self) -> MOD_R {
54        MOD_R::new(((self.bits >> 9) & 0x1f) as u8)
55    }
56}
57impl W {
58    #[doc = "Bits 0:8 - DCO tap selection. These bits select the DCO tap and are modified automatically during FLL operation."]
59    #[inline(always)]
60    #[must_use]
61    pub fn dco(&mut self) -> DCO_W<0> {
62        DCO_W::new(self)
63    }
64    #[doc = "Bits 9:13 - Modulation bit counter. These bits select the modulation pattern. All MOD bits are modified automatically during FLL operation. The DCO register value is incremented when the modulation bit counter rolls over from 31 to 0. If the modulation bit counter decrements from 0 to the maximum count, the DCO register value is also decreased."]
65    #[inline(always)]
66    #[must_use]
67    pub fn mod_(&mut self) -> MOD_W<9> {
68        MOD_W::new(self)
69    }
70    #[doc = "Writes raw bits to the register."]
71    #[inline(always)]
72    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
73        self.0.bits(bits);
74        self
75    }
76}
77#[doc = "Clock System Control 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csctl0](index.html) module"]
78pub struct CSCTL0_SPEC;
79impl crate::RegisterSpec for CSCTL0_SPEC {
80    type Ux = u16;
81}
82#[doc = "`read()` method returns [csctl0::R](R) reader structure"]
83impl crate::Readable for CSCTL0_SPEC {
84    type Reader = R;
85}
86#[doc = "`write(|w| ..)` method takes [csctl0::W](W) writer structure"]
87impl crate::Writable for CSCTL0_SPEC {
88    type Writer = W;
89    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
90    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
91}
92#[doc = "`reset()` method sets CSCTL0 to value 0"]
93impl crate::Resettable for CSCTL0_SPEC {
94    const RESET_VALUE: Self::Ux = 0;
95}
msp430fr247x/cs/csctl0.rs

msp430fr247x/cs/
csctl0.rs
