[][src]Type Definition msp430fr2355::e_usci_b0::ucb0ctlw0::W

type W = W<u16, UCB0CTLW0>;

Writer for register UCB0CTLW0

Implementations

impl W[src]

pub fn ucswrst(&mut self) -> UCSWRST_W<'_>[src]

Bit 0 - Software reset enable

pub fn uctxstt(&mut self) -> UCTXSTT_W<'_>[src]

Bit 1 - Transmit START condition in master mode

pub fn uctxstp(&mut self) -> UCTXSTP_W<'_>[src]

Bit 2 - Transmit STOP condition in master mode

pub fn uctxnack(&mut self) -> UCTXNACK_W<'_>[src]

Bit 3 - Transmit a NACK

pub fn uctr(&mut self) -> UCTR_W<'_>[src]

Bit 4 - Transmitter/receiver

pub fn uctxack(&mut self) -> UCTXACK_W<'_>[src]

Bit 5 - Transmit ACK condition in slave mode

pub fn ucssel(&mut self) -> UCSSEL_W<'_>[src]

Bits 6:7 - eUSCI_B clock source select

pub fn ucsync(&mut self) -> UCSYNC_W<'_>[src]

Bit 8 - Synchronous mode enable

pub fn ucmode(&mut self) -> UCMODE_W<'_>[src]

Bits 9:10 - eUSCI_B mode

pub fn ucmst(&mut self) -> UCMST_W<'_>[src]

Bit 11 - Master mode select

pub fn ucmm(&mut self) -> UCMM_W<'_>[src]

Bit 13 - Multi-master environment select

pub fn ucsla10(&mut self) -> UCSLA10_W<'_>[src]

Bit 14 - Slave addressing mode select

pub fn uca10(&mut self) -> UCA10_W<'_>[src]

Bit 15 - Own addressing mode select