[−][src]Type Definition msp430fr2355::cs::csctl2::R
type R = R<u16, CSCTL2>;
Reader of register CSCTL2
Implementations
impl R
[src]
pub fn flln(&self) -> FLLN_R
[src]
Bits 0:9 - Multiplier bits. These bits set the multiplier value N of the DCO. N must be greater than 0. Writing zero to FLLN causes N to be set to 1.
pub fn flld(&self) -> FLLD_R
[src]
Bits 12:14 - FLL loop divider. These bits divide f(DCOCLK) in the FLL feedback loop. This results in an additional multiplier for the multiplier bits. See also multiplier bits.