msp430f6736/timer_0_a3/
ta0cctl0.rs

1#[doc = "Register `TA0CCTL0` reader"]
2pub struct R(crate::R<TA0CCTL0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TA0CCTL0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TA0CCTL0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TA0CCTL0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TA0CCTL0` writer"]
17pub struct W(crate::W<TA0CCTL0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TA0CCTL0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TA0CCTL0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TA0CCTL0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CCIFG` reader - Capture/compare interrupt flag"]
38pub type CCIFG_R = crate::BitReader<bool>;
39#[doc = "Field `CCIFG` writer - Capture/compare interrupt flag"]
40pub type CCIFG_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 0>;
41#[doc = "Field `COV` reader - Capture/compare overflow flag"]
42pub type COV_R = crate::BitReader<bool>;
43#[doc = "Field `COV` writer - Capture/compare overflow flag"]
44pub type COV_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 1>;
45#[doc = "Field `OUT` reader - PWM Output signal if output mode 0"]
46pub type OUT_R = crate::BitReader<bool>;
47#[doc = "Field `OUT` writer - PWM Output signal if output mode 0"]
48pub type OUT_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 2>;
49#[doc = "Field `CCI` reader - Capture input signal (read)"]
50pub type CCI_R = crate::BitReader<bool>;
51#[doc = "Field `CCI` writer - Capture input signal (read)"]
52pub type CCI_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 3>;
53#[doc = "Field `CCIE` reader - Capture/compare interrupt enable"]
54pub type CCIE_R = crate::BitReader<bool>;
55#[doc = "Field `CCIE` writer - Capture/compare interrupt enable"]
56pub type CCIE_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 4>;
57#[doc = "Output mode 2\n\nValue on reset: 0"]
58#[derive(Clone, Copy, Debug, PartialEq)]
59#[repr(u8)]
60pub enum OUTMOD_A {
61    #[doc = "0: PWM output mode: 0 - output only"]
62    OUTMOD_0 = 0,
63    #[doc = "1: PWM output mode: 1 - set"]
64    OUTMOD_1 = 1,
65    #[doc = "2: PWM output mode: 2 - PWM toggle/reset"]
66    OUTMOD_2 = 2,
67    #[doc = "3: PWM output mode: 3 - PWM set/reset"]
68    OUTMOD_3 = 3,
69    #[doc = "4: PWM output mode: 4 - toggle"]
70    OUTMOD_4 = 4,
71    #[doc = "5: PWM output mode: 5 - Reset"]
72    OUTMOD_5 = 5,
73    #[doc = "6: PWM output mode: 6 - PWM toggle/set"]
74    OUTMOD_6 = 6,
75    #[doc = "7: PWM output mode: 7 - PWM reset/set"]
76    OUTMOD_7 = 7,
77}
78impl From<OUTMOD_A> for u8 {
79    #[inline(always)]
80    fn from(variant: OUTMOD_A) -> Self {
81        variant as _
82    }
83}
84#[doc = "Field `OUTMOD` reader - Output mode 2"]
85pub type OUTMOD_R = crate::FieldReader<u8, OUTMOD_A>;
86impl OUTMOD_R {
87    #[doc = "Get enumerated values variant"]
88    #[inline(always)]
89    pub fn variant(&self) -> OUTMOD_A {
90        match self.bits {
91            0 => OUTMOD_A::OUTMOD_0,
92            1 => OUTMOD_A::OUTMOD_1,
93            2 => OUTMOD_A::OUTMOD_2,
94            3 => OUTMOD_A::OUTMOD_3,
95            4 => OUTMOD_A::OUTMOD_4,
96            5 => OUTMOD_A::OUTMOD_5,
97            6 => OUTMOD_A::OUTMOD_6,
98            7 => OUTMOD_A::OUTMOD_7,
99            _ => unreachable!(),
100        }
101    }
102    #[doc = "Checks if the value of the field is `OUTMOD_0`"]
103    #[inline(always)]
104    pub fn is_outmod_0(&self) -> bool {
105        *self == OUTMOD_A::OUTMOD_0
106    }
107    #[doc = "Checks if the value of the field is `OUTMOD_1`"]
108    #[inline(always)]
109    pub fn is_outmod_1(&self) -> bool {
110        *self == OUTMOD_A::OUTMOD_1
111    }
112    #[doc = "Checks if the value of the field is `OUTMOD_2`"]
113    #[inline(always)]
114    pub fn is_outmod_2(&self) -> bool {
115        *self == OUTMOD_A::OUTMOD_2
116    }
117    #[doc = "Checks if the value of the field is `OUTMOD_3`"]
118    #[inline(always)]
119    pub fn is_outmod_3(&self) -> bool {
120        *self == OUTMOD_A::OUTMOD_3
121    }
122    #[doc = "Checks if the value of the field is `OUTMOD_4`"]
123    #[inline(always)]
124    pub fn is_outmod_4(&self) -> bool {
125        *self == OUTMOD_A::OUTMOD_4
126    }
127    #[doc = "Checks if the value of the field is `OUTMOD_5`"]
128    #[inline(always)]
129    pub fn is_outmod_5(&self) -> bool {
130        *self == OUTMOD_A::OUTMOD_5
131    }
132    #[doc = "Checks if the value of the field is `OUTMOD_6`"]
133    #[inline(always)]
134    pub fn is_outmod_6(&self) -> bool {
135        *self == OUTMOD_A::OUTMOD_6
136    }
137    #[doc = "Checks if the value of the field is `OUTMOD_7`"]
138    #[inline(always)]
139    pub fn is_outmod_7(&self) -> bool {
140        *self == OUTMOD_A::OUTMOD_7
141    }
142}
143#[doc = "Field `OUTMOD` writer - Output mode 2"]
144pub type OUTMOD_W<'a> = crate::FieldWriterSafe<'a, u16, TA0CCTL0_SPEC, u8, OUTMOD_A, 3, 5>;
145impl<'a> OUTMOD_W<'a> {
146    #[doc = "PWM output mode: 0 - output only"]
147    #[inline(always)]
148    pub fn outmod_0(self) -> &'a mut W {
149        self.variant(OUTMOD_A::OUTMOD_0)
150    }
151    #[doc = "PWM output mode: 1 - set"]
152    #[inline(always)]
153    pub fn outmod_1(self) -> &'a mut W {
154        self.variant(OUTMOD_A::OUTMOD_1)
155    }
156    #[doc = "PWM output mode: 2 - PWM toggle/reset"]
157    #[inline(always)]
158    pub fn outmod_2(self) -> &'a mut W {
159        self.variant(OUTMOD_A::OUTMOD_2)
160    }
161    #[doc = "PWM output mode: 3 - PWM set/reset"]
162    #[inline(always)]
163    pub fn outmod_3(self) -> &'a mut W {
164        self.variant(OUTMOD_A::OUTMOD_3)
165    }
166    #[doc = "PWM output mode: 4 - toggle"]
167    #[inline(always)]
168    pub fn outmod_4(self) -> &'a mut W {
169        self.variant(OUTMOD_A::OUTMOD_4)
170    }
171    #[doc = "PWM output mode: 5 - Reset"]
172    #[inline(always)]
173    pub fn outmod_5(self) -> &'a mut W {
174        self.variant(OUTMOD_A::OUTMOD_5)
175    }
176    #[doc = "PWM output mode: 6 - PWM toggle/set"]
177    #[inline(always)]
178    pub fn outmod_6(self) -> &'a mut W {
179        self.variant(OUTMOD_A::OUTMOD_6)
180    }
181    #[doc = "PWM output mode: 7 - PWM reset/set"]
182    #[inline(always)]
183    pub fn outmod_7(self) -> &'a mut W {
184        self.variant(OUTMOD_A::OUTMOD_7)
185    }
186}
187#[doc = "Field `CAP` reader - Capture mode: 1 /Compare mode : 0"]
188pub type CAP_R = crate::BitReader<bool>;
189#[doc = "Field `CAP` writer - Capture mode: 1 /Compare mode : 0"]
190pub type CAP_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 8>;
191#[doc = "Field `SCCI` reader - Latched capture signal (read)"]
192pub type SCCI_R = crate::BitReader<bool>;
193#[doc = "Field `SCCI` writer - Latched capture signal (read)"]
194pub type SCCI_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 10>;
195#[doc = "Field `SCS` reader - Capture sychronize"]
196pub type SCS_R = crate::BitReader<bool>;
197#[doc = "Field `SCS` writer - Capture sychronize"]
198pub type SCS_W<'a> = crate::BitWriter<'a, u16, TA0CCTL0_SPEC, bool, 11>;
199#[doc = "Capture input select 1\n\nValue on reset: 0"]
200#[derive(Clone, Copy, Debug, PartialEq)]
201#[repr(u8)]
202pub enum CCIS_A {
203    #[doc = "0: Capture input select: 0 - CCIxA"]
204    CCIS_0 = 0,
205    #[doc = "1: Capture input select: 1 - CCIxB"]
206    CCIS_1 = 1,
207    #[doc = "2: Capture input select: 2 - GND"]
208    CCIS_2 = 2,
209    #[doc = "3: Capture input select: 3 - Vcc"]
210    CCIS_3 = 3,
211}
212impl From<CCIS_A> for u8 {
213    #[inline(always)]
214    fn from(variant: CCIS_A) -> Self {
215        variant as _
216    }
217}
218#[doc = "Field `CCIS` reader - Capture input select 1"]
219pub type CCIS_R = crate::FieldReader<u8, CCIS_A>;
220impl CCIS_R {
221    #[doc = "Get enumerated values variant"]
222    #[inline(always)]
223    pub fn variant(&self) -> CCIS_A {
224        match self.bits {
225            0 => CCIS_A::CCIS_0,
226            1 => CCIS_A::CCIS_1,
227            2 => CCIS_A::CCIS_2,
228            3 => CCIS_A::CCIS_3,
229            _ => unreachable!(),
230        }
231    }
232    #[doc = "Checks if the value of the field is `CCIS_0`"]
233    #[inline(always)]
234    pub fn is_ccis_0(&self) -> bool {
235        *self == CCIS_A::CCIS_0
236    }
237    #[doc = "Checks if the value of the field is `CCIS_1`"]
238    #[inline(always)]
239    pub fn is_ccis_1(&self) -> bool {
240        *self == CCIS_A::CCIS_1
241    }
242    #[doc = "Checks if the value of the field is `CCIS_2`"]
243    #[inline(always)]
244    pub fn is_ccis_2(&self) -> bool {
245        *self == CCIS_A::CCIS_2
246    }
247    #[doc = "Checks if the value of the field is `CCIS_3`"]
248    #[inline(always)]
249    pub fn is_ccis_3(&self) -> bool {
250        *self == CCIS_A::CCIS_3
251    }
252}
253#[doc = "Field `CCIS` writer - Capture input select 1"]
254pub type CCIS_W<'a> = crate::FieldWriterSafe<'a, u16, TA0CCTL0_SPEC, u8, CCIS_A, 2, 12>;
255impl<'a> CCIS_W<'a> {
256    #[doc = "Capture input select: 0 - CCIxA"]
257    #[inline(always)]
258    pub fn ccis_0(self) -> &'a mut W {
259        self.variant(CCIS_A::CCIS_0)
260    }
261    #[doc = "Capture input select: 1 - CCIxB"]
262    #[inline(always)]
263    pub fn ccis_1(self) -> &'a mut W {
264        self.variant(CCIS_A::CCIS_1)
265    }
266    #[doc = "Capture input select: 2 - GND"]
267    #[inline(always)]
268    pub fn ccis_2(self) -> &'a mut W {
269        self.variant(CCIS_A::CCIS_2)
270    }
271    #[doc = "Capture input select: 3 - Vcc"]
272    #[inline(always)]
273    pub fn ccis_3(self) -> &'a mut W {
274        self.variant(CCIS_A::CCIS_3)
275    }
276}
277#[doc = "Capture mode 1\n\nValue on reset: 0"]
278#[derive(Clone, Copy, Debug, PartialEq)]
279#[repr(u8)]
280pub enum CM_A {
281    #[doc = "0: Capture mode: 0 - disabled"]
282    CM_0 = 0,
283    #[doc = "1: Capture mode: 1 - pos. edge"]
284    CM_1 = 1,
285    #[doc = "2: Capture mode: 1 - neg. edge"]
286    CM_2 = 2,
287    #[doc = "3: Capture mode: 1 - both edges"]
288    CM_3 = 3,
289}
290impl From<CM_A> for u8 {
291    #[inline(always)]
292    fn from(variant: CM_A) -> Self {
293        variant as _
294    }
295}
296#[doc = "Field `CM` reader - Capture mode 1"]
297pub type CM_R = crate::FieldReader<u8, CM_A>;
298impl CM_R {
299    #[doc = "Get enumerated values variant"]
300    #[inline(always)]
301    pub fn variant(&self) -> CM_A {
302        match self.bits {
303            0 => CM_A::CM_0,
304            1 => CM_A::CM_1,
305            2 => CM_A::CM_2,
306            3 => CM_A::CM_3,
307            _ => unreachable!(),
308        }
309    }
310    #[doc = "Checks if the value of the field is `CM_0`"]
311    #[inline(always)]
312    pub fn is_cm_0(&self) -> bool {
313        *self == CM_A::CM_0
314    }
315    #[doc = "Checks if the value of the field is `CM_1`"]
316    #[inline(always)]
317    pub fn is_cm_1(&self) -> bool {
318        *self == CM_A::CM_1
319    }
320    #[doc = "Checks if the value of the field is `CM_2`"]
321    #[inline(always)]
322    pub fn is_cm_2(&self) -> bool {
323        *self == CM_A::CM_2
324    }
325    #[doc = "Checks if the value of the field is `CM_3`"]
326    #[inline(always)]
327    pub fn is_cm_3(&self) -> bool {
328        *self == CM_A::CM_3
329    }
330}
331#[doc = "Field `CM` writer - Capture mode 1"]
332pub type CM_W<'a> = crate::FieldWriterSafe<'a, u16, TA0CCTL0_SPEC, u8, CM_A, 2, 14>;
333impl<'a> CM_W<'a> {
334    #[doc = "Capture mode: 0 - disabled"]
335    #[inline(always)]
336    pub fn cm_0(self) -> &'a mut W {
337        self.variant(CM_A::CM_0)
338    }
339    #[doc = "Capture mode: 1 - pos. edge"]
340    #[inline(always)]
341    pub fn cm_1(self) -> &'a mut W {
342        self.variant(CM_A::CM_1)
343    }
344    #[doc = "Capture mode: 1 - neg. edge"]
345    #[inline(always)]
346    pub fn cm_2(self) -> &'a mut W {
347        self.variant(CM_A::CM_2)
348    }
349    #[doc = "Capture mode: 1 - both edges"]
350    #[inline(always)]
351    pub fn cm_3(self) -> &'a mut W {
352        self.variant(CM_A::CM_3)
353    }
354}
355impl R {
356    #[doc = "Bit 0 - Capture/compare interrupt flag"]
357    #[inline(always)]
358    pub fn ccifg(&self) -> CCIFG_R {
359        CCIFG_R::new((self.bits & 1) != 0)
360    }
361    #[doc = "Bit 1 - Capture/compare overflow flag"]
362    #[inline(always)]
363    pub fn cov(&self) -> COV_R {
364        COV_R::new(((self.bits >> 1) & 1) != 0)
365    }
366    #[doc = "Bit 2 - PWM Output signal if output mode 0"]
367    #[inline(always)]
368    pub fn out(&self) -> OUT_R {
369        OUT_R::new(((self.bits >> 2) & 1) != 0)
370    }
371    #[doc = "Bit 3 - Capture input signal (read)"]
372    #[inline(always)]
373    pub fn cci(&self) -> CCI_R {
374        CCI_R::new(((self.bits >> 3) & 1) != 0)
375    }
376    #[doc = "Bit 4 - Capture/compare interrupt enable"]
377    #[inline(always)]
378    pub fn ccie(&self) -> CCIE_R {
379        CCIE_R::new(((self.bits >> 4) & 1) != 0)
380    }
381    #[doc = "Bits 5:7 - Output mode 2"]
382    #[inline(always)]
383    pub fn outmod(&self) -> OUTMOD_R {
384        OUTMOD_R::new(((self.bits >> 5) & 7) as u8)
385    }
386    #[doc = "Bit 8 - Capture mode: 1 /Compare mode : 0"]
387    #[inline(always)]
388    pub fn cap(&self) -> CAP_R {
389        CAP_R::new(((self.bits >> 8) & 1) != 0)
390    }
391    #[doc = "Bit 10 - Latched capture signal (read)"]
392    #[inline(always)]
393    pub fn scci(&self) -> SCCI_R {
394        SCCI_R::new(((self.bits >> 10) & 1) != 0)
395    }
396    #[doc = "Bit 11 - Capture sychronize"]
397    #[inline(always)]
398    pub fn scs(&self) -> SCS_R {
399        SCS_R::new(((self.bits >> 11) & 1) != 0)
400    }
401    #[doc = "Bits 12:13 - Capture input select 1"]
402    #[inline(always)]
403    pub fn ccis(&self) -> CCIS_R {
404        CCIS_R::new(((self.bits >> 12) & 3) as u8)
405    }
406    #[doc = "Bits 14:15 - Capture mode 1"]
407    #[inline(always)]
408    pub fn cm(&self) -> CM_R {
409        CM_R::new(((self.bits >> 14) & 3) as u8)
410    }
411}
412impl W {
413    #[doc = "Bit 0 - Capture/compare interrupt flag"]
414    #[inline(always)]
415    pub fn ccifg(&mut self) -> CCIFG_W {
416        CCIFG_W::new(self)
417    }
418    #[doc = "Bit 1 - Capture/compare overflow flag"]
419    #[inline(always)]
420    pub fn cov(&mut self) -> COV_W {
421        COV_W::new(self)
422    }
423    #[doc = "Bit 2 - PWM Output signal if output mode 0"]
424    #[inline(always)]
425    pub fn out(&mut self) -> OUT_W {
426        OUT_W::new(self)
427    }
428    #[doc = "Bit 3 - Capture input signal (read)"]
429    #[inline(always)]
430    pub fn cci(&mut self) -> CCI_W {
431        CCI_W::new(self)
432    }
433    #[doc = "Bit 4 - Capture/compare interrupt enable"]
434    #[inline(always)]
435    pub fn ccie(&mut self) -> CCIE_W {
436        CCIE_W::new(self)
437    }
438    #[doc = "Bits 5:7 - Output mode 2"]
439    #[inline(always)]
440    pub fn outmod(&mut self) -> OUTMOD_W {
441        OUTMOD_W::new(self)
442    }
443    #[doc = "Bit 8 - Capture mode: 1 /Compare mode : 0"]
444    #[inline(always)]
445    pub fn cap(&mut self) -> CAP_W {
446        CAP_W::new(self)
447    }
448    #[doc = "Bit 10 - Latched capture signal (read)"]
449    #[inline(always)]
450    pub fn scci(&mut self) -> SCCI_W {
451        SCCI_W::new(self)
452    }
453    #[doc = "Bit 11 - Capture sychronize"]
454    #[inline(always)]
455    pub fn scs(&mut self) -> SCS_W {
456        SCS_W::new(self)
457    }
458    #[doc = "Bits 12:13 - Capture input select 1"]
459    #[inline(always)]
460    pub fn ccis(&mut self) -> CCIS_W {
461        CCIS_W::new(self)
462    }
463    #[doc = "Bits 14:15 - Capture mode 1"]
464    #[inline(always)]
465    pub fn cm(&mut self) -> CM_W {
466        CM_W::new(self)
467    }
468    #[doc = "Writes raw bits to the register."]
469    #[inline(always)]
470    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
471        self.0.bits(bits);
472        self
473    }
474}
475#[doc = "Timer0_A3 Capture/Compare Control 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ta0cctl0](index.html) module"]
476pub struct TA0CCTL0_SPEC;
477impl crate::RegisterSpec for TA0CCTL0_SPEC {
478    type Ux = u16;
479}
480#[doc = "`read()` method returns [ta0cctl0::R](R) reader structure"]
481impl crate::Readable for TA0CCTL0_SPEC {
482    type Reader = R;
483}
484#[doc = "`write(|w| ..)` method takes [ta0cctl0::W](W) writer structure"]
485impl crate::Writable for TA0CCTL0_SPEC {
486    type Writer = W;
487}
488#[doc = "`reset()` method sets TA0CCTL0 to value 0"]
489impl crate::Resettable for TA0CCTL0_SPEC {
490    #[inline(always)]
491    fn reset_value() -> Self::Ux {
492        0
493    }
494}
msp430f6736/timer_0_a3/ta0cctl0.rs

msp430f6736/timer_0_a3/
ta0cctl0.rs
