Re-exports§
Modules§
Macros§
- get_
gp_ regs_ field_ ptr - make_
args - Create a mshv_root_hvcall populated with hypercall parameters Arguments: 1. hypercall code 2. hv_input_* structure 3. hv_output_* structure (optional)
- make_
rep_ args - Create a mshv_root_hvcall populated with rep hypercall parameters
Arguments:
1. hypercall code
2. RepInput
structure, where T is hv_input_*. See make_rep_input!() 3. Slice of the correct type for output data (optional) - make_
rep_ input - Assemble a RepInput
from a hypercall input struct and an array of rep data Arguments: 1. The hv_input_* struct with the input data 2. Name of the __IncompleteArrayField in the struct 3. An array or slice containing the rep data - set_
gp_ regs_ field_ ptr - set_
svm_ field_ u64_ ptr
Structs§
- AllVp
State Components - Fixed buffer for VP state components
- Buffer
- Debug
Registers - Floating
Point Unit - Lapic
State - Fixed buffer for lapic state
- Misc
Regs - Register
Page - Segment
Register - Special
Registers - Standard
Registers - Suspend
Registers - Table
Register - Vcpu
Events - XSave
- Fixed buffer for xsave state
- Xcrs
- __
Bindgen Bitfield Unit - __
Incomplete Array Field - __
kernel_ fd_ set - __
kernel_ fsid_ t - hv_
access_ gpa_ control_ flags__ bindgen_ ty_ 1 - hv_
access_ gpa_ result__ bindgen_ ty_ 1 - hv_
cpuid - hv_
cpuid_ entry - hv_
cpuid_ leaf_ info - hv_
explicit_ suspend_ register__ bindgen_ ty_ 1 - hv_
get_ vp_ cpuid_ values_ flags__ bindgen_ ty_ 1 - hv_
gpa_ page_ range__ bindgen_ ty_ 1 - hv_
gpa_ page_ range__ bindgen_ ty_ 2 - hv_
input_ assert_ virtual_ interrupt - hv_
input_ complete_ isolated_ import - hv_
input_ get_ partition_ property - hv_
input_ get_ vp_ cpuid_ values - hv_
input_ get_ vp_ registers - hv_
input_ import_ isolated_ pages - hv_
input_ install_ intercept - hv_
input_ issue_ psp_ guest_ request - hv_
input_ post_ message_ direct - hv_
input_ read_ gpa - hv_
input_ register_ intercept_ result - hv_
input_ set_ partition_ property - hv_
input_ set_ vp_ registers - hv_
input_ signal_ event_ direct - hv_
input_ translate_ virtual_ address - hv_
input_ vtl__ bindgen_ ty_ 1 - hv_
input_ write_ gpa - hv_
intercept_ suspend_ register__ bindgen_ ty_ 1 - hv_
internal_ activity_ register__ bindgen_ ty_ 1 - hv_
interrupt_ control__ bindgen_ ty_ 1 - hv_
local_ interrupt_ controller_ state - hv_
message - hv_
message_ flags__ bindgen_ ty_ 1 - hv_
message_ header - hv_
opaque_ intercept_ message - hv_
output_ get_ partition_ property - hv_
output_ get_ vp_ cpuid_ values__ bindgen_ ty_ 1 - hv_
output_ read_ gpa - hv_
output_ signal_ event_ direct - hv_
output_ translate_ virtual_ address - hv_
output_ write_ gpa - hv_
partition_ isolation_ properties__ bindgen_ ty_ 1 - hv_
partition_ synthetic_ processor_ features__ bindgen_ ty_ 1 - hv_
pfn_ range__ bindgen_ ty_ 1 - hv_
port_ id__ bindgen_ ty_ 1 - hv_
port_ info - hv_
port_ info__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
port_ info__ bindgen_ ty_ 1__ bindgen_ ty_ 2 - hv_
port_ info__ bindgen_ ty_ 1__ bindgen_ ty_ 3 - hv_
port_ info__ bindgen_ ty_ 1__ bindgen_ ty_ 4 - hv_
psp_ cpuid_ leaf - hv_
psp_ cpuid_ page - hv_
psp_ launch_ finish_ data - hv_
register_ assoc - hv_
register_ vsm_ partition_ config__ bindgen_ ty_ 1 - hv_
register_ x64_ cpuid_ result_ parameters - hv_
register_ x64_ cpuid_ result_ parameters__ bindgen_ ty_ 1 - hv_
register_ x64_ cpuid_ result_ parameters__ bindgen_ ty_ 2 - hv_
register_ x64_ msr_ result_ parameters - hv_
sev_ vmgexit_ offload__ bindgen_ ty_ 1 - hv_
sev_ vmgexit_ port_ info__ bindgen_ ty_ 1 - hv_
snp_ guest_ policy__ bindgen_ ty_ 1 - hv_
snp_ id_ auth_ info - hv_
snp_ id_ block - hv_
stimer_ config__ bindgen_ ty_ 1 - hv_
stimer_ state - hv_
stimer_ state__ bindgen_ ty_ 1 - hv_
synthetic_ timers_ state - hv_
translate_ gva_ result__ bindgen_ ty_ 1 - hv_u128
- hv_
vp_ register_ page - hv_
vp_ register_ page__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
vp_ register_ page__ bindgen_ ty_ 1__ bindgen_ ty_ 1__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
vp_ register_ page__ bindgen_ ty_ 2__ bindgen_ ty_ 1 - hv_
vp_ register_ page__ bindgen_ ty_ 3__ bindgen_ ty_ 1 - hv_
vp_ register_ page_ interrupt_ vectors__ bindgen_ ty_ 1 - hv_
vp_ state_ data_ xsave - hv_
x64_ apic_ eoi_ message - hv_
x64_ cpuid_ intercept_ message - hv_
x64_ exception_ info__ bindgen_ ty_ 1 - hv_
x64_ exception_ intercept_ message - hv_
x64_ fp_ control_ status_ register__ bindgen_ ty_ 1 - hv_
x64_ fp_ control_ status_ register__ bindgen_ ty_ 1__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
x64_ fp_ register__ bindgen_ ty_ 1 - hv_
x64_ gpa_ attribute_ intercept_ message - hv_
x64_ gpa_ attribute_ intercept_ message__ bindgen_ ty_ 1 - hv_
x64_ halt_ message - hv_
x64_ hypercall_ intercept_ message - hv_
x64_ hypercall_ intercept_ message__ bindgen_ ty_ 1 - hv_
x64_ intercept_ message_ header - hv_
x64_ interrupt_ state_ register__ bindgen_ ty_ 1 - hv_
x64_ interruption_ deliverable_ message - hv_
x64_ invalid_ vp_ register_ message - hv_
x64_ io_ port_ access_ info__ bindgen_ ty_ 1 - hv_
x64_ io_ port_ intercept_ message - hv_
x64_ memory_ access_ info__ bindgen_ ty_ 1 - hv_
x64_ memory_ intercept_ message - hv_
x64_ msr_ intercept_ message - hv_
x64_ msr_ npiep_ config_ contents__ bindgen_ ty_ 1 - hv_
x64_ pending_ exception_ event__ bindgen_ ty_ 1 - hv_
x64_ pending_ interruption_ register__ bindgen_ ty_ 1 - hv_
x64_ pending_ virtualization_ fault_ event__ bindgen_ ty_ 1 - hv_
x64_ register_ intercept_ message - hv_
x64_ register_ intercept_ message__ bindgen_ ty_ 1 - hv_
x64_ register_ sev_ control__ bindgen_ ty_ 1 - hv_
x64_ register_ sev_ ghcb__ bindgen_ ty_ 1 - hv_
x64_ register_ sev_ hv_ doorbell__ bindgen_ ty_ 1 - hv_
x64_ segment_ register - hv_
x64_ segment_ register__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
x64_ sint_ deliverable_ message - hv_
x64_ sipi_ intercept_ message - hv_
x64_ table_ register - hv_
x64_ unrecoverable_ exception_ message - hv_
x64_ unsupported_ feature_ message - hv_
x64_ vmgexit_ intercept_ message - hv_
x64_ vmgexit_ intercept_ message__ bindgen_ ty_ 1 - hv_
x64_ vmgexit_ intercept_ message__ bindgen_ ty_ 2 - hv_
x64_ vmgexit_ intercept_ message__ bindgen_ ty_ 2__ bindgen_ ty_ 1 - hv_
x64_ vp_ execution_ state__ bindgen_ ty_ 1 - hv_
x64_ xmm_ control_ status_ register__ bindgen_ ty_ 1 - hv_
x64_ xmm_ control_ status_ register__ bindgen_ ty_ 1__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
x64_ xsave_ xfem_ register__ bindgen_ ty_ 1 - hv_
x64_ xsave_ xfem_ register__ bindgen_ ty_ 2 - mshv_
assert_ interrupt - mshv_
complete_ isolated_ import - mshv_
create_ device - mshv_
create_ partition - mshv_
create_ vp - mshv_
device_ attr - mshv_
get_ set_ vp_ state - mshv_
get_ vp_ cpuid_ values - mshv_
gpap_ access_ bitmap - mshv_
import_ isolated_ pages - mshv_
install_ intercept - mshv_
issue_ psp_ guest_ request - mshv_
modify_ gpa_ host_ access - mshv_
partition_ property - mshv_
post_ message_ direct - mshv_
read_ write_ gpa - mshv_
register_ deliverabilty_ notifications - mshv_
register_ intercept_ result - mshv_
root_ hvcall - mshv_
run_ vp - mshv_
sev_ snp_ ap_ create - mshv_
signal_ event_ direct - mshv_
trace_ config - mshv_
translate_ gva - mshv_
user_ ioeventfd - mshv_
user_ irq_ entry - mshv_
user_ irq_ table - mshv_
user_ irqfd - mshv_
user_ mem_ region - mshv_
vp_ registers - mshv_
vtl_ capabilities - msr_
entry - msr_
list - msrs
- svm_
ghcb_ base - svm_
ghcb_ msr__ bindgen_ ty_ 1 - svm_
ghcb_ msr__ bindgen_ ty_ 2 - svm_
ghcb_ msr__ bindgen_ ty_ 3 - svm_
ghcb_ msr__ bindgen_ ty_ 4
Constants§
- GHCB_
DATA_ MASK - GHCB_
HYP_ FEATURE_ SEV_ SNP - GHCB_
HYP_ FEATURE_ SEV_ SNP_ AP_ CREATION - GHCB_
INFO_ AP_ JUMP_ TABLE - GHCB_
INFO_ BIT_ WIDTH - GHCB_
INFO_ CPUID_ REQUEST - GHCB_
INFO_ CPUID_ RESPONSE - GHCB_
INFO_ HYPERCALL_ OUTPUT - GHCB_
INFO_ HYP_ FEATURE_ REQUEST - GHCB_
INFO_ HYP_ FEATURE_ RESPONSE - GHCB_
INFO_ MASK - GHCB_
INFO_ NORMAL - GHCB_
INFO_ PAGE_ STATE_ CHANGE - GHCB_
INFO_ PAGE_ STATE_ UPDATED - GHCB_
INFO_ PREFERRED_ REQUEST - GHCB_
INFO_ PREFERRED_ RESPONSE - GHCB_
INFO_ REGISTER_ REQUEST - GHCB_
INFO_ REGISTER_ RESPONSE - GHCB_
INFO_ SEV_ INFO_ REQUEST - GHCB_
INFO_ SEV_ INFO_ RESPONSE - GHCB_
INFO_ SHUTDOWN_ REQUEST - GHCB_
INFO_ SPECIAL_ DBGPRINT - GHCB_
INFO_ SPECIAL_ FAST_ CALL - GHCB_
INFO_ SPECIAL_ HYPERCALL - GHCB_
PROTOCOL_ VERSION_ MAX - GHCB_
PROTOCOL_ VERSION_ MIN - HVCALL_
ASSERT_ VIRTUAL_ INTERRUPT - HVCALL_
CLEAR_ VIRTUAL_ INTERRUPT - HVCALL_
COMPLETE_ ISOLATED_ IMPORT - HVCALL_
CREATE_ VP - HVCALL_
DELETE_ VP - HVCALL_
GET_ PARTITION_ PROPERTY - HVCALL_
GET_ VP_ CPUID_ VALUES - HVCALL_
GET_ VP_ REGISTERS - HVCALL_
IMPORT_ ISOLATED_ PAGES - HVCALL_
INSTALL_ INTERCEPT - HVCALL_
ISSUE_ SNP_ PSP_ GUEST_ REQUEST - HVCALL_
POST_ MESSAGE_ DIRECT - HVCALL_
READ_ GPA - HVCALL_
REGISTER_ INTERCEPT_ RESULT - HVCALL_
SET_ PARTITION_ PROPERTY - HVCALL_
SET_ VP_ REGISTERS - HVCALL_
SIGNAL_ EVENT_ DIRECT - HVCALL_
TRANSLATE_ VIRTUAL_ ADDRESS - HVCALL_
WRITE_ GPA - HVGDK_
H_ VERSION - HVGDK_
MINI_ H_ VERSION - HVHDK_
H_ VERSION - HVHVK_
MINI_ VERSION - HV_
GENERIC_ SET_ MASK - HV_
GENERIC_ SET_ SHIFT - HV_
GPA_ ATTRIBUTE_ INTERCEPT_ MAX_ RANGES - HV_
HYPERCALL_ INTERCEPT_ MAX_ XMM_ REGISTERS - HV_
HYP_ LARGE_ PAGE_ SHIFT - HV_
HYP_ PAGE_ MASK - HV_
HYP_ PAGE_ SHIFT - HV_
HYP_ PAGE_ SIZE - HV_
INTERCEPT_ ACCESS_ EXECUTE - HV_
INTERCEPT_ ACCESS_ MASK_ EXECUTE - HV_
INTERCEPT_ ACCESS_ MASK_ NONE - HV_
INTERCEPT_ ACCESS_ MASK_ READ - HV_
INTERCEPT_ ACCESS_ MASK_ WRITE - HV_
INTERCEPT_ ACCESS_ READ - HV_
INTERCEPT_ ACCESS_ WRITE - HV_
INTERRUPT_ VECTOR_ NONE - HV_
MAP_ GPA_ ADJUSTABLE - HV_
MAP_ GPA_ EXECUTABLE - HV_
MAP_ GPA_ KERNEL_ EXECUTABLE - HV_
MAP_ GPA_ LARGE_ PAGE - HV_
MAP_ GPA_ NOT_ CACHED - HV_
MAP_ GPA_ NO_ ACCESS - HV_
MAP_ GPA_ PERMISSIONS_ MASK - HV_
MAP_ GPA_ PERMISSIONS_ NONE - HV_
MAP_ GPA_ READABLE - HV_
MAP_ GPA_ USER_ EXECUTABLE - HV_
MAP_ GPA_ WRITABLE - HV_
MAXIMUM_ PROCESSORS - HV_
MAX_ VP_ INDEX - HV_
MESSAGE_ PAYLOAD_ BYTE_ COUNT - HV_
MESSAGE_ PAYLOAD_ QWORD_ COUNT - HV_
MESSAGE_ SIZE - HV_
PARTITION_ SYNTHETIC_ PROCESSOR_ FEATURES_ BANKS - HV_
PFN_ RNG_ PAGEBITS - HV_
PSP_ CPUID_ LEAF_ COUNT_ MAX - HV_
READ_ WRITE_ GPA_ MAX_ SIZE - HV_
STATUS_ ACCESS_ DENIED - HV_
STATUS_ CALL_ PENDING - HV_
STATUS_ INSUFFICIENT_ BUFFERS - HV_
STATUS_ INSUFFICIENT_ MEMORY - HV_
STATUS_ INVALID_ ALIGNMENT - HV_
STATUS_ INVALID_ CONNECTION_ ID - HV_
STATUS_ INVALID_ HYPERCALL_ CODE - HV_
STATUS_ INVALID_ HYPERCALL_ INPUT - HV_
STATUS_ INVALID_ LP_ INDEX - HV_
STATUS_ INVALID_ PARAMETER - HV_
STATUS_ INVALID_ PARTITION_ ID - HV_
STATUS_ INVALID_ PARTITION_ STATE - HV_
STATUS_ INVALID_ PORT_ ID - HV_
STATUS_ INVALID_ REGISTER_ VALUE - HV_
STATUS_ INVALID_ VP_ INDEX - HV_
STATUS_ INVALID_ VP_ STATE - HV_
STATUS_ NOT_ ACKNOWLEDGED - HV_
STATUS_ NOT_ FOUND - HV_
STATUS_ NO_ RESOURCES - HV_
STATUS_ OPERATION_ DENIED - HV_
STATUS_ OPERATION_ FAILED - HV_
STATUS_ PROCESSOR_ FEATURE_ NOT_ SUPPORTED - HV_
STATUS_ PROPERTY_ VALUE_ OUT_ OF_ RANGE - HV_
STATUS_ SUCCESS - HV_
STATUS_ TIME_ OUT - HV_
STATUS_ UNKNOWN_ PROPERTY - HV_
STATUS_ VTL_ ALREADY_ ENABLED - HV_
SYNIC_ STIMER_ COUNT - HV_
TRANSLATE_ GVA_ ENFORCE_ SMAP - HV_
TRANSLATE_ GVA_ OVERRIDE_ SMAP - HV_
TRANSLATE_ GVA_ PRIVILEGE_ EXEMPT - HV_
TRANSLATE_ GVA_ SET_ PAGE_ TABLE_ BITS - HV_
TRANSLATE_ GVA_ SHADOW_ STACK - HV_
TRANSLATE_ GVA_ SUPERVISOR_ ACCESS - HV_
TRANSLATE_ GVA_ TLB_ FLUSH_ INHIBIT - HV_
TRANSLATE_ GVA_ USER_ ACCESS - HV_
TRANSLATE_ GVA_ VALIDATE_ EXECUTE - HV_
TRANSLATE_ GVA_ VALIDATE_ READ - HV_
TRANSLATE_ GVA_ VALIDATE_ WRITE - HV_
UNSUPPORTED_ FEATURE_ INTERCEPT - HV_
UNSUPPORTED_ FEATURE_ TASK_ SWITCH_ TSS - HV_
VP_ REGISTER_ PAGE_ MAX_ VECTOR_ COUNT - HV_
VP_ REGISTER_ PAGE_ VERSION_ 1 - HV_
X64_ MSR_ APIC_ FREQUENCY - HV_
X64_ MSR_ CRASH_ CTL - HV_
X64_ MSR_ CRASH_ P0 - HV_
X64_ MSR_ CRASH_ P1 - HV_
X64_ MSR_ CRASH_ P2 - HV_
X64_ MSR_ CRASH_ P3 - HV_
X64_ MSR_ CRASH_ P4 - HV_
X64_ MSR_ EOI - HV_
X64_ MSR_ EOM - HV_
X64_ MSR_ GUEST_ IDLE - HV_
X64_ MSR_ GUEST_ OS_ ID - HV_
X64_ MSR_ HYPERCALL - HV_
X64_ MSR_ ICR - HV_
X64_ MSR_ NESTED_ EOM - HV_
X64_ MSR_ NESTED_ SCONTROL - HV_
X64_ MSR_ NESTED_ SIEFP - HV_
X64_ MSR_ NESTED_ SIMP - HV_
X64_ MSR_ NESTED_ SINT0 - HV_
X64_ MSR_ NESTED_ SVERSION - HV_
X64_ MSR_ REFERENCE_ TSC - HV_
X64_ MSR_ RESET - HV_
X64_ MSR_ SCONTROL - HV_
X64_ MSR_ SIEFP - HV_
X64_ MSR_ SIMP - HV_
X64_ MSR_ SINT0 - HV_
X64_ MSR_ SINT1 - HV_
X64_ MSR_ SINT2 - HV_
X64_ MSR_ SINT3 - HV_
X64_ MSR_ SINT4 - HV_
X64_ MSR_ SINT5 - HV_
X64_ MSR_ SINT6 - HV_
X64_ MSR_ SINT7 - HV_
X64_ MSR_ SINT8 - HV_
X64_ MSR_ SINT9 - HV_
X64_ MSR_ SINT10 - HV_
X64_ MSR_ SINT11 - HV_
X64_ MSR_ SINT12 - HV_
X64_ MSR_ SINT13 - HV_
X64_ MSR_ SINT14 - HV_
X64_ MSR_ SINT15 - HV_
X64_ MSR_ SIRBP - HV_
X64_ MSR_ STIME R0_ CONFIG - HV_
X64_ MSR_ STIME R0_ COUNT - HV_
X64_ MSR_ STIME R1_ CONFIG - HV_
X64_ MSR_ STIME R1_ COUNT - HV_
X64_ MSR_ STIME R2_ CONFIG - HV_
X64_ MSR_ STIME R2_ COUNT - HV_
X64_ MSR_ STIME R3_ CONFIG - HV_
X64_ MSR_ STIME R3_ COUNT - HV_
X64_ MSR_ SVERSION - HV_
X64_ MSR_ TIME_ REF_ COUNT - HV_
X64_ MSR_ TPR - HV_
X64_ MSR_ TSC_ FREQUENCY - HV_
X64_ MSR_ VP_ ASSIST_ PAGE - HV_
X64_ MSR_ VP_ ASSIST_ PAGE_ ADDRESS_ MASK - HV_
X64_ MSR_ VP_ ASSIST_ PAGE_ ADDRESS_ SHIFT - HV_
X64_ MSR_ VP_ ASSIST_ PAGE_ ENABLE - HV_
X64_ MSR_ VP_ INDEX - HV_
X64_ MSR_ VP_ RUNTIME - HV_
X64_ PENDING_ EXCEPTION - HV_
X64_ PENDING_ INTERRUPT - HV_
X64_ PENDING_ NMI - HV_
X64_ REGISTER_ CLASS_ FLAGS - HV_
X64_ REGISTER_ CLASS_ GENERAL - HV_
X64_ REGISTER_ CLASS_ IP - HV_
X64_ REGISTER_ CLASS_ SEGMENT - HV_
X64_ REGISTER_ CLASS_ XMM - IA32_
MSR_ APIC_ BASE - IA32_
MSR_ BNDCFGS - IA32_
MSR_ CSTAR - IA32_
MSR_ DEBUG_ CTL - IA32_
MSR_ EFER - IA32_
MSR_ KERNEL_ GS_ BASE - IA32_
MSR_ LSTAR - IA32_
MSR_ MISC_ ENABLE - IA32_
MSR_ MTRR_ CAP - IA32_
MSR_ MTRR_ DEF_ TYPE - IA32_
MSR_ MTRR_ FIX4K_ C0000 - IA32_
MSR_ MTRR_ FIX4K_ C8000 - IA32_
MSR_ MTRR_ FIX4K_ D0000 - IA32_
MSR_ MTRR_ FIX4K_ D8000 - IA32_
MSR_ MTRR_ FIX4K_ E0000 - IA32_
MSR_ MTRR_ FIX4K_ E8000 - IA32_
MSR_ MTRR_ FIX4K_ F0000 - IA32_
MSR_ MTRR_ FIX4K_ F8000 - IA32_
MSR_ MTRR_ FIX16K_ 80000 - IA32_
MSR_ MTRR_ FIX16K_ A0000 - IA32_
MSR_ MTRR_ FIX64K_ 00000 - IA32_
MSR_ MTRR_ PHYSBAS E0 - IA32_
MSR_ MTRR_ PHYSBAS E1 - IA32_
MSR_ MTRR_ PHYSBAS E2 - IA32_
MSR_ MTRR_ PHYSBAS E3 - IA32_
MSR_ MTRR_ PHYSBAS E4 - IA32_
MSR_ MTRR_ PHYSBAS E5 - IA32_
MSR_ MTRR_ PHYSBAS E6 - IA32_
MSR_ MTRR_ PHYSBAS E7 - IA32_
MSR_ MTRR_ PHYSMAS K0 - IA32_
MSR_ MTRR_ PHYSMAS K1 - IA32_
MSR_ MTRR_ PHYSMAS K2 - IA32_
MSR_ MTRR_ PHYSMAS K3 - IA32_
MSR_ MTRR_ PHYSMAS K4 - IA32_
MSR_ MTRR_ PHYSMAS K5 - IA32_
MSR_ MTRR_ PHYSMAS K6 - IA32_
MSR_ MTRR_ PHYSMAS K7 - IA32_
MSR_ PAT - IA32_
MSR_ SFMASK - IA32_
MSR_ SPEC_ CTRL - IA32_
MSR_ STAR - IA32_
MSR_ SYSENTER_ CS - IA32_
MSR_ SYSENTER_ EIP - IA32_
MSR_ SYSENTER_ ESP - IA32_
MSR_ TSC - IA32_
MSR_ TSC_ ADJUST - IA32_
MSR_ TSC_ AUX - LOCAL_
APIC_ OFFSET_ APIC_ ID - LOCAL_
APIC_ OFFSET_ APR - LOCAL_
APIC_ OFFSET_ CURRENT_ COUNT - LOCAL_
APIC_ OFFSET_ DFR - LOCAL_
APIC_ OFFSET_ DIVIDER - LOCAL_
APIC_ OFFSET_ EOI - LOCAL_
APIC_ OFFSET_ ERROR - LOCAL_
APIC_ OFFSET_ ERROR_ LVT - LOCAL_
APIC_ OFFSET_ ICR_ HIGH - LOCAL_
APIC_ OFFSET_ ICR_ LOW - LOCAL_
APIC_ OFFSET_ INITIAL_ COUNT - LOCAL_
APIC_ OFFSET_ IRR - LOCAL_
APIC_ OFFSET_ ISR - LOCAL_
APIC_ OFFSET_ LDR - LOCAL_
APIC_ OFFSET_ LINT0_ LVT - LOCAL_
APIC_ OFFSET_ LINT1_ LVT - LOCAL_
APIC_ OFFSET_ PERFMON_ LVT - LOCAL_
APIC_ OFFSET_ PPR - LOCAL_
APIC_ OFFSET_ REMOTE_ READ - LOCAL_
APIC_ OFFSET_ SPURIOUS - LOCAL_
APIC_ OFFSET_ THERMAL_ LVT - LOCAL_
APIC_ OFFSET_ TIMER_ LVT - LOCAL_
APIC_ OFFSET_ TMR - LOCAL_
APIC_ OFFSET_ TPR - LOCAL_
APIC_ OFFSET_ VERSION - LOCAL_
X2APIC_ OFFSET_ SELF_ IPI - MSHV_
CREATE_ DEVICE_ TEST - MSHV_
DEV_ TYPE_ MAX - MSHV_
DEV_ TYPE_ VFIO - MSHV_
DEV_ VFIO_ FILE - MSHV_
DEV_ VFIO_ FILE_ ADD - MSHV_
DEV_ VFIO_ FILE_ DEL - MSHV_
DIAG_ IOCTL - MSHV_
GPAP_ ACCESS_ OP_ CLEAR - MSHV_
GPAP_ ACCESS_ OP_ COUNT - MSHV_
GPAP_ ACCESS_ OP_ NOOP - MSHV_
GPAP_ ACCESS_ OP_ SET - MSHV_
GPAP_ ACCESS_ TYPE_ ACCESSED - MSHV_
GPAP_ ACCESS_ TYPE_ COUNT - MSHV_
GPAP_ ACCESS_ TYPE_ DIRTY - MSHV_
GPA_ HOST_ ACCESS_ BIT_ ACQUIRE - MSHV_
GPA_ HOST_ ACCESS_ BIT_ COUNT - MSHV_
GPA_ HOST_ ACCESS_ BIT_ LARGE_ PAGE - MSHV_
GPA_ HOST_ ACCESS_ BIT_ READABLE - MSHV_
GPA_ HOST_ ACCESS_ BIT_ WRITABLE - MSHV_
IOCTL - MSHV_
IOEVENTFD_ BIT_ COUNT - MSHV_
IOEVENTFD_ BIT_ DATAMATCH - MSHV_
IOEVENTFD_ BIT_ DEASSIGN - MSHV_
IOEVENTFD_ BIT_ PIO - MSHV_
IRQFD_ BIT_ COUNT - MSHV_
IRQFD_ BIT_ DEASSIGN - MSHV_
IRQFD_ BIT_ RESAMPLE - MSHV_
ISOLATED_ PAGE_ COUNT - MSHV_
ISOLATED_ PAGE_ CPUID - MSHV_
ISOLATED_ PAGE_ NORMAL - MSHV_
ISOLATED_ PAGE_ SECRETS - MSHV_
ISOLATED_ PAGE_ UNMEASURED - MSHV_
ISOLATED_ PAGE_ VMSA - MSHV_
ISOLATED_ PAGE_ ZERO - MSHV_
PT_ BIT_ COUNT - MSHV_
PT_ BIT_ GPA_ SUPER_ PAGES - MSHV_
PT_ BIT_ LAPIC - MSHV_
PT_ BIT_ X2APIC - MSHV_
PT_ ISOLATION_ COUNT - MSHV_
PT_ ISOLATION_ NONE - MSHV_
PT_ ISOLATION_ SNP - MSHV_
RUN_ VP_ BUF_ SZ - MSHV_
SET_ MEM_ BIT_ COUNT - MSHV_
SET_ MEM_ BIT_ EXECUTABLE - MSHV_
SET_ MEM_ BIT_ UNMAP - MSHV_
SET_ MEM_ BIT_ WRITABLE - MSHV_
TRACE_ IOCTL - MSHV_
VP_ MAX_ REGISTERS - MSHV_
VP_ MMAP_ OFFSET_ COUNT - MSHV_
VP_ MMAP_ OFFSET_ GHCB - MSHV_
VP_ MMAP_ OFFSET_ INTERCEPT_ MESSAGE - MSHV_
VP_ MMAP_ OFFSET_ REGISTERS - MSHV_
VP_ STATE_ COUNT - MSHV_
VP_ STATE_ LAPIC - MSHV_
VP_ STATE_ SIEFP - MSHV_
VP_ STATE_ SIMP - MSHV_
VP_ STATE_ SYNTHETIC_ TIMERS - MSHV_
VP_ STATE_ XSAVE - MSHV_
VTL_ CAP_ BIT_ COUNT - MSHV_
VTL_ CAP_ BIT_ DR6_ SHARED - MSHV_
VTL_ CAP_ BIT_ REGISTER_ PAGE - MSHV_
VTL_ CAP_ BIT_ RETURN_ ACTION - SVM_
EXITCODE_ HV_ DOORBELL_ PAGE - SVM_
EXITCODE_ IOIO_ PROT - SVM_
EXITCODE_ MMIO_ READ - SVM_
EXITCODE_ MMIO_ WRITE - SVM_
EXITCODE_ SNP_ AP_ CREATION - SVM_
EXITCODE_ SNP_ EXTENDED_ GUEST_ REQUEST - SVM_
EXITCODE_ SNP_ GUEST_ REQUEST - SVM_
NAE_ HV_ DOORBELL_ PAGE_ CLEAR - SVM_
NAE_ HV_ DOORBELL_ PAGE_ GET_ PREFERRED - SVM_
NAE_ HV_ DOORBELL_ PAGE_ QUERY - SVM_
NAE_ HV_ DOORBELL_ PAGE_ SET - VP_
STATE_ COMPONENTS_ BUFFER_ SIZE - __
BITS_ PER_ LONG - __
FD_ SETSIZE - hv_
access_ gpa_ result_ code_ HV_ ACCESS_ GPA_ ILLEGAL_ OVERLAY_ ACCESS - hv_
access_ gpa_ result_ code_ HV_ ACCESS_ GPA_ READ_ INTERCEPT - hv_
access_ gpa_ result_ code_ HV_ ACCESS_ GPA_ SUCCESS - hv_
access_ gpa_ result_ code_ HV_ ACCESS_ GPA_ UNMAPPED - hv_
access_ gpa_ result_ code_ HV_ ACCESS_ GPA_ WRITE_ INTERCEPT - hv_
generic_ set_ format_ HV_ GENERIC_ SET_ ALL - hv_
generic_ set_ format_ HV_ GENERIC_ SET_ SPARSE_ 4K - hv_
intercept_ type_ HV_ INTERCEPT_ MC_ UPDATE_ PATCH_ LEVEL_ MSR_ READ - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ EXCEPTION - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ HYPERCALL - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ INVALID - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ MAX - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ MMIO - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ RESERVE D0 - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ APIC_ INIT_ SIPI - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ APIC_ SMI - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ APIC_ WRITE - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ CPUID - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ GLOBAL_ CPUID - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ IO_ PORT - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ MSR - hv_
intercept_ type_ HV_ INTERCEPT_ TYPE_ X64_ MSR_ INDEX - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ EXTINT - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ FIXED - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ INIT - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ LOCALIN T0 - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ LOCALIN T1 - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ LOWESTPRIORITY - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ MAXIMUM - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ NMI - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ REMOTEREAD - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ SIPI - hv_
interrupt_ type_ HV_ X64_ INTERRUPT_ TYPE_ SMI - hv_
isolated_ page_ size_ HV_ ISOLATED_ PAGE_ SIZE_ 2MB - hv_
isolated_ page_ size_ HV_ ISOLATED_ PAGE_ SIZE_ 4KB - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ COUNT - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ CPUID - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ NORMAL - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ SECRETS - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ UNMEASURED - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ VMSA - hv_
isolated_ page_ type_ HV_ ISOLATED_ PAGE_ TYPE_ ZERO - hv_
message_ type_ HVMSG_ ASYNC_ CALL_ COMPLETION - hv_
message_ type_ HVMSG_ EVENTLOG_ BUFFERCOMPLETE - hv_
message_ type_ HVMSG_ GPA_ ATTRIBUTE_ INTERCEPT - hv_
message_ type_ HVMSG_ GPA_ INTERCEPT - hv_
message_ type_ HVMSG_ HYPERCALL_ INTERCEPT - hv_
message_ type_ HVMSG_ INVALID_ VP_ REGISTER_ VALUE - hv_
message_ type_ HVMSG_ NONE - hv_
message_ type_ HVMSG_ OPAQUE_ INTERCEPT - hv_
message_ type_ HVMSG_ SCHEDULER_ VP_ SIGNAL_ BITSET - hv_
message_ type_ HVMSG_ SCHEDULER_ VP_ SIGNAL_ PAIR - hv_
message_ type_ HVMSG_ SYNIC_ EVENT_ INTERCEPT - hv_
message_ type_ HVMSG_ SYNIC_ SINT_ DELIVERABLE - hv_
message_ type_ HVMSG_ SYNIC_ SINT_ INTERCEPT - hv_
message_ type_ HVMSG_ TIMER_ EXPIRED - hv_
message_ type_ HVMSG_ UNACCEPTED_ GPA - hv_
message_ type_ HVMSG_ UNMAPPED_ GPA - hv_
message_ type_ HVMSG_ UNRECOVERABLE_ EXCEPTION - hv_
message_ type_ HVMSG_ UNSUPPORTED_ FEATURE - hv_
message_ type_ HVMSG_ X64_ APIC_ EOI - hv_
message_ type_ HVMSG_ X64_ CPUID_ INTERCEPT - hv_
message_ type_ HVMSG_ X64_ EXCEPTION_ INTERCEPT - hv_
message_ type_ HVMSG_ X64_ HALT - hv_
message_ type_ HVMSG_ X64_ INTERRUPTION_ DELIVERABLE - hv_
message_ type_ HVMSG_ X64_ IOMMU_ PRQ - hv_
message_ type_ HVMSG_ X64_ IO_ PORT_ INTERCEPT - hv_
message_ type_ HVMSG_ X64_ LEGACY_ FP_ ERROR - hv_
message_ type_ HVMSG_ X64_ MSR_ INTERCEPT - hv_
message_ type_ HVMSG_ X64_ SEV_ VMGEXIT_ INTERCEPT - hv_
message_ type_ HVMSG_ X64_ SIPI_ INTERCEPT - hv_
partition_ isolation_ state_ HV_ PARTITION_ ISOLATION_ INSECURE_ CLEAN - hv_
partition_ isolation_ state_ HV_ PARTITION_ ISOLATION_ INSECURE_ DIRTY - hv_
partition_ isolation_ state_ HV_ PARTITION_ ISOLATION_ INVALID - hv_
partition_ isolation_ state_ HV_ PARTITION_ ISOLATION_ SECURE - hv_
partition_ isolation_ state_ HV_ PARTITION_ ISOLATION_ SECURE_ DIRTY - hv_
partition_ isolation_ state_ HV_ PARTITION_ ISOLATION_ SECURE_ TERMINATING - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ ALLOCATION_ ID - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ COMPATIBILITY_ VERSION - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ CPU_ CAP - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ CPU_ GROUP_ ID - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ CPU_ RESERVE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ CPU_ WEIGHT - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ DEBUG_ CHANNEL_ ID - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ DEFAULT_ SGX_ LAUNCH_ CONTRO L0 - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ DEFAULT_ SGX_ LAUNCH_ CONTRO L1 - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ DEFAULT_ SGX_ LAUNCH_ CONTRO L2 - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ DEFAULT_ SGX_ LAUNCH_ CONTRO L3 - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ ENLIGHTENMENT_ MODIFICATIONS - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ GPA_ PAGE_ ACCESS_ TRACKING - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ GUEST_ OS_ ID - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ HYPERCALL_ DOORBELL_ PAGE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ IMPLEMENTED_ PHYSICAL_ ADDRESS_ BITS - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ ISOLATION_ CONTROL - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ ISOLATION_ POLICY - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ ISOLATION_ STATE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ MAX_ XSAVE_ DATA_ SIZE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ MONITORING_ ID - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ NESTED_ TLB_ SIZE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ NON_ ARCHITECTURAL_ CORE_ SHARING - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PHYSICAL_ ADDRESS_ WIDTH - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PRIVILEGE_ FLAGS - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSORS_ PER_ SOCKET - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ CLOCK_ FREQUENCY - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ CL_ FLUSH_ SIZE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ FEATURE S0 - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ FEATURE S1 - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ FEATURES_ DEPRECATED - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ VENDOR - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ VIRTUALIZATION_ FEATURES - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ PROCESSOR_ XSAVE_ FEATURES - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ REFERENCE_ TIME - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ SEV_ VMGEXIT_ OFFLOADS - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ SGX_ LAUNCH_ CONTROL_ CONFIG - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ SUSPEND - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ SYNTHETIC_ PROC_ FEATURES - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ TIME_ FREEZE - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ UNIMPLEMENTED_ MSR_ ACTION - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ VIRTUAL_ TLB_ PAGE_ COUNT - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ VSM_ CONFIG - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ VSM_ PERMISSIONS_ DIRTY_ SINCE_ LAST_ QUERY - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ XSAVE_ STATES - hv_
partition_ property_ code_ HV_ PARTITION_ PROPERTY_ ZERO_ MEMORY_ ON_ RESET - hv_
port_ type_ HV_ PORT_ TYPE_ DOORBELL - hv_
port_ type_ HV_ PORT_ TYPE_ EVENT - hv_
port_ type_ HV_ PORT_ TYPE_ MESSAGE - hv_
port_ type_ HV_ PORT_ TYPE_ MONITOR - hv_
register_ name_ HV_ REGISTER_ CPU_ MANAGEMENT_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ CPU_ MANAGEMENT_ VERSION - hv_
register_ name_ HV_ REGISTER_ DEBUG_ DEVICE_ OPTIONS - hv_
register_ name_ HV_ REGISTER_ DELIVERABILITY_ NOTIFICATIONS - hv_
register_ name_ HV_ REGISTER_ DISPATCH_ SUSPEND - hv_
register_ name_ HV_ REGISTER_ EOM - hv_
register_ name_ HV_ REGISTER_ EXPLICIT_ SUSPEND - hv_
register_ name_ HV_ REGISTER_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ GUEST_ CRASH_ CTL - hv_
register_ name_ HV_ REGISTER_ GUEST_ CRASH_ P0 - hv_
register_ name_ HV_ REGISTER_ GUEST_ CRASH_ P1 - hv_
register_ name_ HV_ REGISTER_ GUEST_ CRASH_ P2 - hv_
register_ name_ HV_ REGISTER_ GUEST_ CRASH_ P3 - hv_
register_ name_ HV_ REGISTER_ GUEST_ CRASH_ P4 - hv_
register_ name_ HV_ REGISTER_ GUEST_ IDLE - hv_
register_ name_ HV_ REGISTER_ GUEST_ OS_ ID - hv_
register_ name_ HV_ REGISTER_ HARDWARE_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ HYPERVISOR_ VERSION - hv_
register_ name_ HV_ REGISTER_ IMPLEMENTATION_ LIMITS_ INFO - hv_
register_ name_ HV_ REGISTER_ INSTRUCTION_ EMULATION_ HINTS - hv_
register_ name_ HV_ REGISTER_ INTERCEPT_ SUSPEND - hv_
register_ name_ HV_ REGISTER_ INTERNAL_ ACTIVITY_ STATE - hv_
register_ name_ HV_ REGISTER_ INTERRUPT_ CLOCK_ FREQUENCY - hv_
register_ name_ HV_ REGISTER_ INTERRUPT_ STATE - hv_
register_ name_ HV_ REGISTER_ IPT_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ ISOLATION_ CAPABILITIES - hv_
register_ name_ HV_ REGISTER_ MEMORY_ ZEROING_ CONTROL - hv_
register_ name_ HV_ REGISTER_ NESTED_ EOM - hv_
register_ name_ HV_ REGISTER_ NESTED_ SCONTROL - hv_
register_ name_ HV_ REGISTER_ NESTED_ SIFP - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT0 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT1 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT2 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT3 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT4 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT5 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT6 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT7 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT8 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT9 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT10 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT11 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT12 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT13 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT14 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SINT15 - hv_
register_ name_ HV_ REGISTER_ NESTED_ SIPP - hv_
register_ name_ HV_ REGISTER_ NESTED_ SIRBP - hv_
register_ name_ HV_ REGISTER_ NESTED_ SVERSION - hv_
register_ name_ HV_ REGISTER_ NESTED_ VIRT_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ NESTED_ VP_ INDEX - hv_
register_ name_ HV_ REGISTER_ PENDING_ EVEN T0 - hv_
register_ name_ HV_ REGISTER_ PENDING_ EVEN T1 - hv_
register_ name_ HV_ REGISTER_ PENDING_ INTERRUPTION - hv_
register_ name_ HV_ REGISTER_ POWER_ STATE_ CONFIG_ C1 - hv_
register_ name_ HV_ REGISTER_ POWER_ STATE_ CONFIG_ C2 - hv_
register_ name_ HV_ REGISTER_ POWER_ STATE_ CONFIG_ C3 - hv_
register_ name_ HV_ REGISTER_ POWER_ STATE_ TRIGGER_ C1 - hv_
register_ name_ HV_ REGISTER_ POWER_ STATE_ TRIGGER_ C2 - hv_
register_ name_ HV_ REGISTER_ POWER_ STATE_ TRIGGER_ C3 - hv_
register_ name_ HV_ REGISTER_ PRIVILEGES_ AND_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ PROCESSOR_ CLOCK_ FREQUENCY - hv_
register_ name_ HV_ REGISTER_ REFERENCE_ TSC - hv_
register_ name_ HV_ REGISTER_ SCONTROL - hv_
register_ name_ HV_ REGISTER_ SIEFP - hv_
register_ name_ HV_ REGISTER_ SIMP - hv_
register_ name_ HV_ REGISTER_ SINT0 - hv_
register_ name_ HV_ REGISTER_ SINT1 - hv_
register_ name_ HV_ REGISTER_ SINT2 - hv_
register_ name_ HV_ REGISTER_ SINT3 - hv_
register_ name_ HV_ REGISTER_ SINT4 - hv_
register_ name_ HV_ REGISTER_ SINT5 - hv_
register_ name_ HV_ REGISTER_ SINT6 - hv_
register_ name_ HV_ REGISTER_ SINT7 - hv_
register_ name_ HV_ REGISTER_ SINT8 - hv_
register_ name_ HV_ REGISTER_ SINT9 - hv_
register_ name_ HV_ REGISTER_ SINT10 - hv_
register_ name_ HV_ REGISTER_ SINT11 - hv_
register_ name_ HV_ REGISTER_ SINT12 - hv_
register_ name_ HV_ REGISTER_ SINT13 - hv_
register_ name_ HV_ REGISTER_ SINT14 - hv_
register_ name_ HV_ REGISTER_ SINT15 - hv_
register_ name_ HV_ REGISTER_ SIRBP - hv_
register_ name_ HV_ REGISTER_ SKIP_ LEVEL_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ STATS_ PARTITION_ INTERNAL - hv_
register_ name_ HV_ REGISTER_ STATS_ PARTITION_ RETAIL - hv_
register_ name_ HV_ REGISTER_ STATS_ VP_ INTERNAL - hv_
register_ name_ HV_ REGISTER_ STATS_ VP_ RETAIL - hv_
register_ name_ HV_ REGISTER_ STIME R0_ CONFIG - hv_
register_ name_ HV_ REGISTER_ STIME R0_ COUNT - hv_
register_ name_ HV_ REGISTER_ STIME R1_ CONFIG - hv_
register_ name_ HV_ REGISTER_ STIME R1_ COUNT - hv_
register_ name_ HV_ REGISTER_ STIME R2_ CONFIG - hv_
register_ name_ HV_ REGISTER_ STIME R2_ COUNT - hv_
register_ name_ HV_ REGISTER_ STIME R3_ CONFIG - hv_
register_ name_ HV_ REGISTER_ STIME R3_ COUNT - hv_
register_ name_ HV_ REGISTER_ STIME_ UNHALTED_ TIMER_ CONFIG - hv_
register_ name_ HV_ REGISTER_ STIME_ UNHALTED_ TIMER_ COUNT - hv_
register_ name_ HV_ REGISTER_ SVERSION - hv_
register_ name_ HV_ REGISTER_ SVM_ FEATURES_ INFO - hv_
register_ name_ HV_ REGISTER_ TIME_ REF_ COUNT - hv_
register_ name_ HV_ REGISTER_ VP_ ASSIST_ PAGE - hv_
register_ name_ HV_ REGISTER_ VP_ INDEX - hv_
register_ name_ HV_ REGISTER_ VP_ ROOT_ SIGNAL_ COUNT - hv_
register_ name_ HV_ REGISTER_ VP_ RUNTIME - hv_
register_ name_ HV_ REGISTER_ VSM_ CAPABILITIES - hv_
register_ name_ HV_ REGISTER_ VSM_ CODE_ PAGE_ OFFSETS - hv_
register_ name_ HV_ REGISTER_ VSM_ PARTITION_ CONFIG - hv_
register_ name_ HV_ REGISTER_ VSM_ PARTITION_ STATUS - hv_
register_ name_ HV_ REGISTER_ VSM_ VINA - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL0 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL1 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL2 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL3 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL4 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL5 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL6 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL7 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL8 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL9 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL10 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL11 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL12 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL13 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ SECURE_ CONFIG_ VTL14 - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ STATUS - hv_
register_ name_ HV_ REGISTER_ VSM_ VP_ WAIT_ FOR_ TLB_ LOCK - hv_
register_ name_ HV_ X64_ REGISTER_ APIC_ BASE - hv_
register_ name_ HV_ X64_ REGISTER_ APIC_ ID - hv_
register_ name_ HV_ X64_ REGISTER_ APIC_ VERSION - hv_
register_ name_ HV_ X64_ REGISTER_ AVAILABL E0008007E - hv_
register_ name_ HV_ X64_ REGISTER_ AVAILABL E0008007F - hv_
register_ name_ HV_ X64_ REGISTER_ BNDCFGS - hv_
register_ name_ HV_ X64_ REGISTER_ CR0 - hv_
register_ name_ HV_ X64_ REGISTER_ CR2 - hv_
register_ name_ HV_ X64_ REGISTER_ CR3 - hv_
register_ name_ HV_ X64_ REGISTER_ CR4 - hv_
register_ name_ HV_ X64_ REGISTER_ CR8 - hv_
register_ name_ HV_ X64_ REGISTER_ CR_ INTERCEPT_ CONTROL - hv_
register_ name_ HV_ X64_ REGISTER_ CR_ INTERCEPT_ CR0_ MASK - hv_
register_ name_ HV_ X64_ REGISTER_ CR_ INTERCEPT_ CR4_ MASK - hv_
register_ name_ HV_ X64_ REGISTER_ CR_ INTERCEPT_ IA32_ MISC_ ENABLE_ MASK - hv_
register_ name_ HV_ X64_ REGISTER_ CS - hv_
register_ name_ HV_ X64_ REGISTER_ CSTAR - hv_
register_ name_ HV_ X64_ REGISTER_ DEBUG_ CTL - hv_
register_ name_ HV_ X64_ REGISTER_ DELIVERABILITY_ NOTIFICATIONS - hv_
register_ name_ HV_ X64_ REGISTER_ DR0 - hv_
register_ name_ HV_ X64_ REGISTER_ DR1 - hv_
register_ name_ HV_ X64_ REGISTER_ DR2 - hv_
register_ name_ HV_ X64_ REGISTER_ DR3 - hv_
register_ name_ HV_ X64_ REGISTER_ DR6 - hv_
register_ name_ HV_ X64_ REGISTER_ DR7 - hv_
register_ name_ HV_ X64_ REGISTER_ DS - hv_
register_ name_ HV_ X64_ REGISTER_ DS_ AREA - hv_
register_ name_ HV_ X64_ REGISTER_ EFER - hv_
register_ name_ HV_ X64_ REGISTER_ EMULATED_ TIMER_ CONTROL - hv_
register_ name_ HV_ X64_ REGISTER_ EMULATED_ TIMER_ PERIOD - hv_
register_ name_ HV_ X64_ REGISTER_ ES - hv_
register_ name_ HV_ X64_ REGISTER_ FIXED_ CTR0 - hv_
register_ name_ HV_ X64_ REGISTER_ FIXED_ CTR_ CTRL - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ CONTROL_ STATUS - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX0 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX1 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX2 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX3 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX4 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX5 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX6 - hv_
register_ name_ HV_ X64_ REGISTER_ FP_ MMX7 - hv_
register_ name_ HV_ X64_ REGISTER_ FS - hv_
register_ name_ HV_ X64_ REGISTER_ GDTR - hv_
register_ name_ HV_ X64_ REGISTER_ GHCB - hv_
register_ name_ HV_ X64_ REGISTER_ GS - hv_
register_ name_ HV_ X64_ REGISTER_ HYPERCALL - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ FEATURE_ CONTROL - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ BASIC - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ CR0_ FIXE D0 - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ CR0_ FIXE D1 - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ CR4_ FIXE D0 - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ CR4_ FIXE D1 - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ ENTRY_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ EPT_ VPID_ CAP - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ EXIT_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ MISC - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ PINBASED_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ PROCBASED_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ PROCBASED_ CTLS2 - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ TRUE_ ENTRY_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ TRUE_ EXIT_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ TRUE_ PINBASED_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ TRUE_ PROCBASED_ CTLS - hv_
register_ name_ HV_ X64_ REGISTER_ IA32_ VMX_ VMCS_ ENUM - hv_
register_ name_ HV_ X64_ REGISTER_ IDTR - hv_
register_ name_ HV_ X64_ REGISTER_ INITIAL_ APIC_ ID - hv_
register_ name_ HV_ X64_ REGISTER_ INTERMEDIATE_ CR0 - hv_
register_ name_ HV_ X64_ REGISTER_ INTERMEDIATE_ CR4 - hv_
register_ name_ HV_ X64_ REGISTER_ INTERMEDIATE_ CR8 - hv_
register_ name_ HV_ X64_ REGISTER_ KERNEL_ GS_ BASE - hv_
register_ name_ HV_ X64_ REGISTER_ LBR_ FROM0 - hv_
register_ name_ HV_ X64_ REGISTER_ LBR_ INFO0 - hv_
register_ name_ HV_ X64_ REGISTER_ LBR_ SELECT - hv_
register_ name_ HV_ X64_ REGISTER_ LBR_ TO0 - hv_
register_ name_ HV_ X64_ REGISTER_ LBR_ TOS - hv_
register_ name_ HV_ X64_ REGISTER_ LDTR - hv_
register_ name_ HV_ X64_ REGISTER_ LER_ FROM_ LIP - hv_
register_ name_ HV_ X64_ REGISTER_ LER_ TO_ LIP - hv_
register_ name_ HV_ X64_ REGISTER_ LSTAR - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ IA32_ MISC_ ENABLE - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ CAP - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ DEF_ TYPE - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K C0000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K C8000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K D0000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K D8000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K E0000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K E8000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K F0000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX4K F8000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX16 K80000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX16K A0000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ FIX64 K00000 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE0 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE1 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE2 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE3 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE4 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE5 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE6 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE7 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE8 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASE9 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASEA - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASEB - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASEC - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASED - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASEE - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ BASEF - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK0 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK1 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK2 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK3 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK4 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK5 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK6 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK7 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK8 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASK9 - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASKA - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASKB - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASKC - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASKD - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASKE - hv_
register_ name_ HV_ X64_ REGISTER_ MSR_ MTRR_ PHYS_ MASKF - hv_
register_ name_ HV_ X64_ REGISTER_ PAT - hv_
register_ name_ HV_ X64_ REGISTER_ PEBS_ ENABLE - hv_
register_ name_ HV_ X64_ REGISTER_ PEBS_ FRONTEND - hv_
register_ name_ HV_ X64_ REGISTER_ PEBS_ LD_ LAT - hv_
register_ name_ HV_ X64_ REGISTER_ PENDING_ DEBUG_ EXCEPTION - hv_
register_ name_ HV_ X64_ REGISTER_ PERF_ EVT_ SEL0 - hv_
register_ name_ HV_ X64_ REGISTER_ PERF_ GLOBAL_ CTRL - hv_
register_ name_ HV_ X64_ REGISTER_ PERF_ GLOBAL_ IN_ USE - hv_
register_ name_ HV_ X64_ REGISTER_ PERF_ GLOBAL_ STATUS - hv_
register_ name_ HV_ X64_ REGISTER_ PMC0 - hv_
register_ name_ HV_ X64_ REGISTER_ PM_ TIMER_ ASSIST - hv_
register_ name_ HV_ X64_ REGISTER_ PRED_ CMD - hv_
register_ name_ HV_ X64_ REGISTER_ R8 - hv_
register_ name_ HV_ X64_ REGISTER_ R9 - hv_
register_ name_ HV_ X64_ REGISTER_ R10 - hv_
register_ name_ HV_ X64_ REGISTER_ R11 - hv_
register_ name_ HV_ X64_ REGISTER_ R12 - hv_
register_ name_ HV_ X64_ REGISTER_ R13 - hv_
register_ name_ HV_ X64_ REGISTER_ R14 - hv_
register_ name_ HV_ X64_ REGISTER_ R15 - hv_
register_ name_ HV_ X64_ REGISTER_ RAX - hv_
register_ name_ HV_ X64_ REGISTER_ RBP - hv_
register_ name_ HV_ X64_ REGISTER_ RBX - hv_
register_ name_ HV_ X64_ REGISTER_ RCX - hv_
register_ name_ HV_ X64_ REGISTER_ RDI - hv_
register_ name_ HV_ X64_ REGISTER_ RDX - hv_
register_ name_ HV_ X64_ REGISTER_ REG_ PAGE - hv_
register_ name_ HV_ X64_ REGISTER_ RFLAGS - hv_
register_ name_ HV_ X64_ REGISTER_ RIP - hv_
register_ name_ HV_ X64_ REGISTER_ RSI - hv_
register_ name_ HV_ X64_ REGISTER_ RSP - hv_
register_ name_ HV_ X64_ REGISTER_ RTIT_ ADDR0A - hv_
register_ name_ HV_ X64_ REGISTER_ RTIT_ CR3_ MATCH - hv_
register_ name_ HV_ X64_ REGISTER_ RTIT_ CTL - hv_
register_ name_ HV_ X64_ REGISTER_ RTIT_ OUTPUT_ BASE - hv_
register_ name_ HV_ X64_ REGISTER_ RTIT_ OUTPUT_ MASK_ PTRS - hv_
register_ name_ HV_ X64_ REGISTER_ RTIT_ STATUS - hv_
register_ name_ HV_ X64_ REGISTER_ SEV_ CONTROL - hv_
register_ name_ HV_ X64_ REGISTER_ SEV_ DOORBELL_ GPA - hv_
register_ name_ HV_ X64_ REGISTER_ SEV_ GHCB_ GPA - hv_
register_ name_ HV_ X64_ REGISTER_ SFMASK - hv_
register_ name_ HV_ X64_ REGISTER_ SGX_ LAUNCH_ CONTRO L0 - hv_
register_ name_ HV_ X64_ REGISTER_ SGX_ LAUNCH_ CONTRO L1 - hv_
register_ name_ HV_ X64_ REGISTER_ SGX_ LAUNCH_ CONTRO L2 - hv_
register_ name_ HV_ X64_ REGISTER_ SGX_ LAUNCH_ CONTRO L3 - hv_
register_ name_ HV_ X64_ REGISTER_ SPEC_ CTRL - hv_
register_ name_ HV_ X64_ REGISTER_ SS - hv_
register_ name_ HV_ X64_ REGISTER_ STAR - hv_
register_ name_ HV_ X64_ REGISTER_ SYNTHETIC_ EOI - hv_
register_ name_ HV_ X64_ REGISTER_ SYNTHETIC_ ICR - hv_
register_ name_ HV_ X64_ REGISTER_ SYNTHETIC_ TPR - hv_
register_ name_ HV_ X64_ REGISTER_ SYSENTER_ CS - hv_
register_ name_ HV_ X64_ REGISTER_ SYSENTER_ EIP - hv_
register_ name_ HV_ X64_ REGISTER_ SYSENTER_ ESP - hv_
register_ name_ HV_ X64_ REGISTER_ TR - hv_
register_ name_ HV_ X64_ REGISTER_ TSC - hv_
register_ name_ HV_ X64_ REGISTER_ TSC_ ADJUST - hv_
register_ name_ HV_ X64_ REGISTER_ TSC_ AUX - hv_
register_ name_ HV_ X64_ REGISTER_ VIRT_ SPEC_ CTRL - hv_
register_ name_ HV_ X64_ REGISTER_ XFEM - hv_
register_ name_ HV_ X64_ REGISTER_ XMM0 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM1 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM2 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM3 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM4 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM5 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM6 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM7 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM8 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM9 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM10 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM11 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM12 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM13 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM14 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM15 - hv_
register_ name_ HV_ X64_ REGISTER_ XMM_ CONTROL_ STATUS - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ GPA_ ILLEGAL_ OVERLAY_ ACCESS - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ GPA_ NO_ READ_ ACCESS - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ GPA_ NO_ WRITE_ ACCESS - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ GPA_ UNACCEPTED - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ GPA_ UNMAPPED - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ INTERCEPT - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ INVALIDE_ PAGE_ TABLE_ FLAGS - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ PAGE_ NOT_ PRESENT - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ PRIVILEGE_ VIOLATION - hv_
translate_ gva_ result_ code_ HV_ TRANSLATE_ GVA_ SUCCESS - hv_
unimplemented_ msr_ action_ HV_ UNIMPLEMENTED_ MSR_ ACTION_ COUNT - hv_
unimplemented_ msr_ action_ HV_ UNIMPLEMENTED_ MSR_ ACTION_ FAULT - hv_
unimplemented_ msr_ action_ HV_ UNIMPLEMENTED_ MSR_ ACTION_ IGNORE_ WRITE_ READ_ ZERO
Functions§
- get_
default_ snp_ guest_ policy - Get default SEV-SNP guest policy supported by Microsoft Hypervisor.
- get_
default_ vmgexit_ offload_ features - Get default VMGEXIT offload features supported by Microsoft Hypervisor.
- get_
sev_ control_ register - Helper function to get sev control register for a given VMSA PFN.
- msr_
to_ hv_ reg_ name - parse_
gpa_ range - Helper function to parse the GPA range
Type Aliases§
- __be16
- __be32
- __be64
- __
kernel_ caddr_ t - __
kernel_ clock_ t - __
kernel_ clockid_ t - __
kernel_ daddr_ t - __
kernel_ gid16_ t - __
kernel_ gid32_ t - __
kernel_ gid_ t - __
kernel_ ino_ t - __
kernel_ ipc_ pid_ t - __
kernel_ key_ t - __
kernel_ loff_ t - __
kernel_ long_ t - __
kernel_ mode_ t - __
kernel_ mqd_ t - __
kernel_ off_ t - __
kernel_ old_ dev_ t - __
kernel_ old_ gid_ t - __
kernel_ old_ time_ t - __
kernel_ old_ uid_ t - __
kernel_ pid_ t - __
kernel_ ptrdiff_ t - __
kernel_ sighandler_ t - __
kernel_ size_ t - __
kernel_ ssize_ t - __
kernel_ suseconds_ t - __
kernel_ time64_ t - __
kernel_ time_ t - __
kernel_ timer_ t - __
kernel_ uid16_ t - __
kernel_ uid32_ t - __
kernel_ uid_ t - __
kernel_ ulong_ t - __le16
- __le32
- __le64
- __
poll_ t - __s8
- __s16
- __s32
- __s64
- __s128
- __sum16
- __u8
- __u16
- __u32
- __u64
- __u128
- __wsum
- _bindgen_
ty_ 1 - _bindgen_
ty_ 2 - _bindgen_
ty_ 3 - _bindgen_
ty_ 4 - _bindgen_
ty_ 5 - _bindgen_
ty_ 6 - _bindgen_
ty_ 7 - _bindgen_
ty_ 8 - _bindgen_
ty_ 9 - _bindgen_
ty_ 10 - _bindgen_
ty_ 11 - _bindgen_
ty_ 12 - _bindgen_
ty_ 13 - bool_
- hv_
access_ gpa_ result_ code - hv_
generic_ set_ format - hv_
intercept_ type - hv_
interrupt_ type - hv_
isolated_ page_ size - hv_
isolated_ page_ type - hv_
message_ type - hv_
nano100_ time_ t - hv_
partition_ isolation_ state - hv_
partition_ property_ code - hv_
port_ type - hv_
register_ name - hv_
translate_ gva_ result_ code - hv_
unimplemented_ msr_ action
Unions§
- hv_
access_ gpa_ control_ flags - hv_
access_ gpa_ result - hv_
explicit_ suspend_ register - hv_
get_ vp_ cpuid_ values_ flags - hv_
gpa_ page_ range - hv_
input_ vtl - hv_
intercept_ parameters - hv_
intercept_ suspend_ register - hv_
internal_ activity_ register - hv_
interrupt_ control - hv_
message__ bindgen_ ty_ 1 - hv_
message_ flags - hv_
message_ header__ bindgen_ ty_ 1 - hv_
output_ get_ vp_ cpuid_ values - hv_
partition_ complete_ isolated_ import_ data - hv_
partition_ isolation_ properties - hv_
partition_ synthetic_ processor_ features - hv_
pfn_ range - hv_
port_ id - hv_
port_ info__ bindgen_ ty_ 1 - hv_
register_ intercept_ result_ parameters - hv_
register_ value - hv_
register_ vsm_ partition_ config - hv_
sev_ vmgexit_ offload - hv_
sev_ vmgexit_ port_ info - hv_
snp_ guest_ policy - hv_
stimer_ config - hv_
translate_ gva_ result - hv_
vp_ register_ page__ bindgen_ ty_ 1 - hv_
vp_ register_ page__ bindgen_ ty_ 2 - hv_
vp_ register_ page__ bindgen_ ty_ 3 - hv_
vp_ register_ page__ bindgen_ ty_ 1__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
vp_ register_ page_ interrupt_ vectors - hv_
x64_ exception_ info - hv_
x64_ fp_ control_ status_ register - hv_
x64_ fp_ control_ status_ register__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
x64_ fp_ register - hv_
x64_ interrupt_ state_ register - hv_
x64_ io_ port_ access_ info - hv_
x64_ memory_ access_ info - hv_
x64_ msr_ npiep_ config_ contents - hv_
x64_ pending_ exception_ event - hv_
x64_ pending_ interruption_ register - hv_
x64_ pending_ virtualization_ fault_ event - hv_
x64_ register_ access_ info - hv_
x64_ register_ sev_ control - hv_
x64_ register_ sev_ ghcb - hv_
x64_ register_ sev_ hv_ doorbell - hv_
x64_ segment_ register__ bindgen_ ty_ 1 - hv_
x64_ vp_ execution_ state - hv_
x64_ xmm_ control_ status_ register - hv_
x64_ xmm_ control_ status_ register__ bindgen_ ty_ 1__ bindgen_ ty_ 1 - hv_
x64_ xsave_ xfem_ register - svm_
ghcb_ msr