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mpfs_pac/
clint.rs

1use super::bindings::*;
2use super::hart_id;
3
4pub const CLINT: *mut CLINT_Type = CLINT_BASE as *mut CLINT_Type;
5
6/// Raises a synchronous software interrupt by writing into the MSIP register.
7///
8/// # Safety
9///
10/// - Caller must ensure global interrupts are enabled
11/// - `set_csr(mie, MIP_MSIP)` must be set on the hart receiving the interrupt
12pub unsafe fn raise_soft_interrupt(hart_id: usize) {
13    unsafe {
14        (*CLINT).MSIP[hart_id] = 0x1;
15        riscv::asm::fence(); // equivalent to mb() memory barrier
16    }
17}
18
19/// Clears a synchronous software interrupt by clearing the MSIP register.
20///
21/// # Safety
22///
23/// This function reads a CSR register and modifies hardware state.
24pub unsafe fn clear_soft_interrupt() {
25    unsafe {
26        let hart_id = hart_id();
27        (*CLINT).MSIP[hart_id] = 0x0;
28
29        // Read back to ensure write completion
30        let _ = (*CLINT).MSIP[hart_id];
31    }
32}