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Module sync

Module sync 

Source
Expand description

Timeline synchronization primitives for parallel execution.

This module provides device-agnostic synchronization using timeline signals, which are monotonically increasing counters that enable ordering of operations across devices.

§Design

Timeline signals abstract over:

  • CPU: AtomicU64 with parking_lot condvar for waiting
  • CUDA: Event pools keyed by timeline value
  • Metal: MTLSharedEvent (future)
  • HIP: Similar to CUDA (future)

§Example

let signal = CpuTimelineSignal::new();

// Producer thread
signal.set(1);  // Signal completion of operation 1

// Consumer thread
signal.wait(1, 1000)?;  // Wait for operation 1 to complete

Structs§

CpuTimelineSignal
CPU-based timeline signal using atomics and condvar.

Traits§

TimelineSignal
Monotonic timeline signal for synchronization.