moore_vhdl_syntax/
lib.rs

1// Copyright (c) 2016-2021 Fabian Schuiki
2
3//! A lexical analyzer and parser for VHDL source files as per
4//! IEEE 1076-2008.
5
6extern crate moore_common;
7
8pub mod ast;
9pub mod lexer;
10pub mod parser;
11
12use moore_common::errors::*;
13use moore_common::grind::{self, Grinder};
14use moore_common::source::*;
15
16pub fn parse(src: Source) -> Result<Vec<ast::DesignUnit>, ()> {
17    use self::parser::token_stream::TokenStream;
18
19    // Get a grinder on the bytes of the source file.
20    let content = src.get_content();
21    let bytes = grind::from_iter(content.bytes().iter().map(|x| *x))
22        .vent(|err: DiagBuilder2| eprintln!("{}", err));
23
24    // Perform lexical analysis on the bytes.
25    let tokens = lexer::Lexer::new(bytes, src);
26
27    // Parse the file.
28    let mut parser = parser::basic::BasicParser::new(tokens);
29    let ast = parser::rules::parse_design_file(&mut parser);
30
31    if parser.is_error() {
32        Err(())
33    } else {
34        Ok(ast)
35    }
36}
moore_vhdl_syntax/lib.rs

moore_vhdl_syntax/
lib.rs
