Module moore_svlog_syntax::token[][src]

Expand description

Defines all tokens that may result from performing lexical analysis on a SystemVerilog source file. This module is inspired heavily by the tokens used in the Rust compiler.

Re-exports

pub use self::DelimToken::*;
pub use self::Lit::*;
pub use self::Token::*;

Enums

A delimiter token such as parentheses or brackets.

Abstract literals such as strings.

Operator symbols.

Expression precedence. Note that a few kinds of expression are right-associative rather than the default left-associative.

The unit of a time literal.

A primary token emitted by the lexer.

Functions