moondancer_pac/generated/
spi0.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    phy: PHY,
5    cs: CS,
6    status: STATUS,
7    _reserved3: [u8; 0x02],
8    data: DATA,
9}
10impl RegisterBlock {
11    #[doc = "0x00 - PHY control register length : SPI transfer length in bits. width : SPI transfer bus width (1/2/4/8). mask : SPI DQ output enable mask."]
12    #[inline(always)]
13    pub const fn phy(&self) -> &PHY {
14        &self.phy
15    }
16    #[doc = "0x04 - SPI chip select register select : SPI chip select signal."]
17    #[inline(always)]
18    pub const fn cs(&self) -> &CS {
19        &self.cs
20    }
21    #[doc = "0x05 - Status register rx_ready : RX FIFO contains data. tx_ready : TX FIFO ready to receive data."]
22    #[inline(always)]
23    pub const fn status(&self) -> &STATUS {
24        &self.status
25    }
26    #[doc = "0x08..0x10 - Data register rx : Read the next byte in the RX FIFO tx : Write the given byte to the TX FIFO"]
27    #[inline(always)]
28    pub const fn data(&self) -> &DATA {
29        &self.data
30    }
31}
32#[doc = "phy (rw) register accessor: PHY control register length : SPI transfer length in bits. width : SPI transfer bus width (1/2/4/8). mask : SPI DQ output enable mask.\n\nYou can [`read`](crate::Reg::read) this register and get [`phy::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`phy::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@phy`]
33module"]
34#[doc(alias = "phy")]
35pub type PHY = crate::Reg<phy::PHY_SPEC>;
36#[doc = "PHY control register length : SPI transfer length in bits. width : SPI transfer bus width (1/2/4/8). mask : SPI DQ output enable mask."]
37pub mod phy;
38#[doc = "cs (rw) register accessor: SPI chip select register select : SPI chip select signal.\n\nYou can [`read`](crate::Reg::read) this register and get [`cs::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`]
39module"]
40#[doc(alias = "cs")]
41pub type CS = crate::Reg<cs::CS_SPEC>;
42#[doc = "SPI chip select register select : SPI chip select signal."]
43pub mod cs;
44#[doc = "status (rw) register accessor: Status register rx_ready : RX FIFO contains data. tx_ready : TX FIFO ready to receive data.\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
45module"]
46#[doc(alias = "status")]
47pub type STATUS = crate::Reg<status::STATUS_SPEC>;
48#[doc = "Status register rx_ready : RX FIFO contains data. tx_ready : TX FIFO ready to receive data."]
49pub mod status;
50#[doc = "data (rw) register accessor: Data register rx : Read the next byte in the RX FIFO tx : Write the given byte to the TX FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
51module"]
52#[doc(alias = "data")]
53pub type DATA = crate::Reg<data::DATA_SPEC>;
54#[doc = "Data register rx : Read the next byte in the RX FIFO tx : Write the given byte to the TX FIFO"]
55pub mod data;
moondancer_pac/generated/spi0.rs

moondancer_pac/generated/
spi0.rs
