Module cache 

Cache alignment utilities for performance optimization.

This module is the single source of truth for the two cache granularities the workspace reasons about. They are different numbers on the same target and conflating them is a defect in both directions:

• CACHE_LINE_SIZE — the coherence/transfer granularity of one line. Correct for prefetch strides and for sizing an iteration chunk so a block of elements lands in one line. 64 bytes on x86-64 and aarch64.
• DESTRUCTIVE_INTERFERENCE_SIZE — the separation two independently written atomics need to avoid false sharing. On x86-64 and modern aarch64 the adjacent-line prefetcher pulls lines in pairs, so two objects 64 bytes apart still ping-pong a shared 128-byte sector; separation is 128 bytes. Correct for padding and alignment. Never for chunk sizing — doubling a chunk width silently doubles a kernel’s working set.

The per-target values follow the table in crossbeam-utils’ CachePadded (crossbeam-utils 0.8, src/cache_padded.rs), which documents the vendor sources for each architecture.

Structs

CacheAligned

A wrapper that pushes its value onto its own false-sharing sector.

Constants

CACHE_LINE_SIZE

Coherence and transfer granularity of a single cache line, in bytes.

DESTRUCTIVE_INTERFERENCE_SIZE

Separation, in bytes, at which two concurrently written objects stop interfering — the C++ hardware_destructive_interference_size.

Functions

align_to_cache_line

Round a size up to the next cache-line boundary.

Type Aliases

CachePad

Zero-sized alignment marker.