Crate mmio_rs 

Zero-overhead, no_std memory-mapped I/O register abstraction.

Quick start

use mmio_rs::prelude::*;

// Implement a critical section for your target once per binary.
mmio_rs::impl_critical_section!(
    acquire: { /* disable interrupts, return previous state */ 0 },
    release: |_state| { /* restore interrupt state */ }
);

// Define a peripheral's register layout.
mmio_rs::register_block! {
    pub struct Uart @ 0x4000_1000 {
        dr:  u32 => ReadWrite @ 0x00,
        sr:  u32 => ReadOnly  @ 0x04,
        brr: u32 => ReadWrite @ 0x08,
    }
}

// Use it.
Uart::dr().write(b'A' as u32);
let status = Uart::sr().read();
Uart::brr().write_field(0xFFFF, 0, 0x0683); // set baud divisor

Modules

prelude

Convenience re-export of the most commonly used types.

Macros

impl_critical_section

Implement this macro once in your project to provide the critical section.

register_block

Define a register block with named fields and a static base address.

Structs

AtomicRegister

Wraps a Register to provide interrupt-safe read-modify-write operations via the critical_section mechanism.

DynamicRegisterBlock

Like RegisterBlock but the register type T and access marker Access are fixed at construction time, and the base address can be set after creation.

IrqGuard

RAII guard that acquires the critical section on creation and releases it on drop.

ReadOnly

Access marker: register can only be read.

ReadWrite

Access marker: register can be both read and written.

Register

A typed pointer to a single memory-mapped register.

RegisterBlock

A fixed-size array of N registers sharing a base address, addressed by index.

WriteOnly

Access marker: register can only be written.

Functions

critical_section

Executes f inside a critical section, returning its result.